IRIS
OTTAVI, MARCO
 Distribuzione geografica
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Continente #
NA - Nord America 41.102
AS - Asia 4.464
EU - Europa 3.612
SA - Sud America 621
AF - Africa 55
Continente sconosciuto - Info sul continente non disponibili 16
OC - Oceania 9
Totale 49.879
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Nazione #
US - Stati Uniti d'America 40.990
SG - Singapore 2.111
CN - Cina 1.052
BR - Brasile 531
UA - Ucraina 528
RU - Federazione Russa 473
IT - Italia 450
DE - Germania 418
IE - Irlanda 400
HK - Hong Kong 396
FR - Francia 391
PL - Polonia 337
VN - Vietnam 302
GB - Regno Unito 197
JP - Giappone 163
FI - Finlandia 149
KR - Corea 120
SE - Svezia 99
IN - India 64
CA - Canada 60
NL - Olanda 51
AT - Austria 38
BD - Bangladesh 33
AR - Argentina 32
IQ - Iraq 28
KG - Kirghizistan 28
MX - Messico 27
ES - Italia 22
TR - Turchia 22
ID - Indonesia 21
ZA - Sudafrica 20
UZ - Uzbekistan 17
EC - Ecuador 16
BE - Belgio 15
CO - Colombia 14
EU - Europa 14
OM - Oman 14
TW - Taiwan 14
LT - Lituania 11
PK - Pakistan 9
AE - Emirati Arabi Uniti 8
MA - Marocco 8
AU - Australia 7
CH - Svizzera 7
CL - Cile 7
VE - Venezuela 7
DM - Dominica 6
KE - Kenya 6
PH - Filippine 6
RO - Romania 6
SA - Arabia Saudita 6
TH - Thailandia 6
BG - Bulgaria 5
DZ - Algeria 5
GR - Grecia 5
IL - Israele 5
PS - Palestinian Territory 5
CR - Costa Rica 4
DO - Repubblica Dominicana 4
GE - Georgia 4
IR - Iran 4
NP - Nepal 4
PE - Perù 4
PY - Paraguay 4
AZ - Azerbaigian 3
EG - Egitto 3
ET - Etiopia 3
HN - Honduras 3
JO - Giordania 3
MD - Moldavia 3
MY - Malesia 3
SC - Seychelles 3
SN - Senegal 3
UY - Uruguay 3
BO - Bolivia 2
KZ - Kazakistan 2
MN - Mongolia 2
PA - Panama 2
QA - Qatar 2
AL - Albania 1
AM - Armenia 1
BH - Bahrain 1
BW - Botswana 1
BY - Bielorussia 1
BZ - Belize 1
CI - Costa d'Avorio 1
CW - ???statistics.table.value.countryCode.CW??? 1
CZ - Repubblica Ceca 1
GA - Gabon 1
GT - Guatemala 1
HU - Ungheria 1
JM - Giamaica 1
KH - Cambogia 1
KW - Kuwait 1
LB - Libano 1
MV - Maldive 1
NI - Nicaragua 1
NZ - Nuova Zelanda 1
PT - Portogallo 1
RS - Serbia 1
Totale 49.871
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Città #
Woodbridge 11.437
Houston 10.200
Wilmington 10.188
Fairfield 1.448
Singapore 997
Ashburn 846
Ann Arbor 718
Seattle 580
San Jose 572
Cambridge 502
Jacksonville 474
Chandler 443
Dearborn 398
Beijing 385
Hong Kong 382
Dublin 377
Kraków 304
Medford 287
Santa Clara 192
Rome 176
New York 164
Tokyo 147
Zhengzhou 143
Lawrence 135
Los Angeles 117
The Dalles 108
Lauterbourg 95
Hanoi 92
Ho Chi Minh City 87
San Diego 83
Moscow 73
Dallas 70
Buffalo 68
Menlo Park 68
Council Bluffs 61
São Paulo 59
London 49
Milan 46
North Bergen 44
Redondo Beach 36
Nuremberg 35
Shanghai 35
Nanjing 34
Helsinki 31
Redwood City 30
Warsaw 29
Suzhou 28
Mülheim 26
Boardman 25
Mountain View 25
Orem 25
Chicago 24
Creede 24
Munich 24
Frankfurt am Main 23
Montreal 23
Norwalk 20
Amsterdam 19
Hefei 19
Verona 19
Brooklyn 18
Palo Alto 18
Chongqing 17
Manchester 17
Phoenix 17
Rio de Janeiro 17
Stockholm 17
Vienna 17
Falls Church 16
Guangzhou 16
Toronto 15
Atlanta 14
Boston 14
Brussels 14
Muscat 14
Altenberge 13
Belo Horizonte 13
Denver 12
Marano Di Napoli 12
Cangzhou 11
Jinan 11
Kilburn 11
Seoul 11
Turku 11
University Park 11
Brasília 10
Cedarhurst 10
Dhaka 10
Johannesburg 10
Taipei 10
Ankara 9
Biên Hòa 9
Chennai 9
Hangzhou 9
Jakarta 9
Kunming 9
Poplar 9
Baghdad 8
Formello 8
Fortaleza 8
Totale 43.663
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Nome #
Error detection in signed digit arithmetic circuit with parity checker [adder example] 576
2T2M memristor based TCAM cell for low power applications 528
A Synergetic use of bloom filters for error detection and correction 487
Reliability evaluation of repairable/reconfigurable FPGAs 483
Yield analysis of compiler-based arrays of embedded SRAMs 482
Bit flip injection in processor-based architectures: a case study 480
A novel method for SEE validation of complex SoCs using Low-Energy Proton beams 480
A fault tolerant hardware based file system manager for solid state mass memory 472
Sistemi elettronici tolleranti ai guasti per applicazioni spaziali 469
Design and characterization of a high-safety hardware/software module for the acquisition of Eurobalise telegrams 469
Novel Complementary Resistive Switch Crossbar Memory Write and Read Schemes 467
Design of a QCA memory with parallel read/serial write 465
A self-checking cell logic block for fault tolerant FPGAs 465
Analysis and evaluations of reliability of reconfigurable FPGAs 464
QCA memory with parallel read/serial write: design and analysis 464
Feedback based droop mitigation 462
Design and evaluation of a hardware on-line program-flow checker for embedded microcontrollers 457
Qualitative techniques for System-on-Chip test with low-energy protons 456
A 20 mW, 4.8 Gbit/sec, SEU robust serializer in 65nm for read-out of data from LHC experiments 456
A single-bit and double-adjacent error correcting parallel decoder for multiple-bit error correcting BCH codes 455
Development of a dynamic routing system for a fault tolerant solid state mass memory 454
Partially reversible pipelined QCA circuits: combining low power with high throughput 453
A fault-tolerant 176 GBit solid state mass memory architecture 452
A fault-tolerant solid state mass memory for highly reliable instrumentation 452
Fault detection and repair of DSC arrays through memristor sensing 451
Simulation of reconfigurable memory core yield 450
Yield evaluation methods of SRAM arrays: A comparative study 450
A method to construct low delay single error correction codes for protecting data bits only 449
Characterization of low power radiation-hard reed-solomon code protected serializers in 65-nm for HEP experiments electronics 448
Enhancing embedded SRAM security and error tolerance with hardware CRC and obfuscation 447
Tile-based design of a serial memory in QCA 446
Two-dimensional schemes for clocking/timing of QCA circuits 446
Reducing the cost of single error correction with parity sharing 445
System-on-chip oriented fault-tolerant sequential systems implementation methodology 445
Testing of inter-word coupling faults in word-oriented SRAMs 443
Design and analysis of single event tolerant slave latches for enhanced scan delay testing 442
Two-dimensional schemes for clocking/timing of QCA circuits 441
Dependable Multicore Architectures at Nanoscale: the view from Europe 439
A method to protect Bloom filters from soft errors 439
A serial memory by quantum-dot cellular automata (QCA) 438
Modeling magnetic quantum-dot cellular automata by HDL 435
F-DICE: a multiple node upset tolerant flip-flop for highly radioactive environments 435
Complementary resistive switch based stateful logic operations using material implication 435
A QCA memory with parallel read/serial write: design and analysis 434
Reducing the cost of implementing error correction codes in content addressable memories 433
Low delay single symbol error correction codes based on reed solomon codes 429
Characterization of data retention faults in DRAM devices 427
Low cost memristor associative memory design for full and partial matching applications 427
Using memristor state change behavior to identify faults in photovoltaic arrays 424
QCA circuits for robust coplanar crossing 423
Design of a totally self checking signature analysis checker for finite state machines 423
Localization of faults in radix-n signed digit adders 422
On the Design of Reversible QDCA Systems 420
Introduction to the special section 419
Total ionizing dose effects on DRAM data retention time 418
On the design of two single event tolerant slave latches for scan delay testing 415
On the yield of compiler-based eSRAMs 414
A Comparative Evaluation of Designs for Reliable Memory Systems 413
Data integrity evaluations of Reed Solomon codes for storage systems [solid state mass memories] 412
Fault tolerant solid state mass memory for space applications 411
A line-based parallel memory for QCA implementation 411
On the Error Effects of Random Clock Shifts in Quantum-dot Cellular Automata Circuits 411
High throughput and low power dissipation in QCA pipelines using bennett clocking 410
Evaluating the yield of repairable SRAMs for ATE 407
Complementary resistive switch-based arithmetic logic implementations using material implication 407
Modeling and evaluating errors due to random clock shifts in quantum-dot cellular automata circuits 406
QCA Circuits for robust coplanar crossing 402
Guest Editorial: IEEE Transactions on Computers and IEEE Transactions on Emerging Topics in Computing Joint Special Section on Innovation in Reconfigurable Computing Fabrics from Devices to Architectures 402
Implementing universal logic in QCA 401
Clocking and cell placement for QCA 394
Error detection and correction in content addressable memories by using bloom filters 394
Evaluating data integrity of memory systems by configurable Markov models 393
Novel memory designs for QCA implementation 393
Timing verification of QCA memory architectures 392
QCA Memory 392
Hdlq: A hdl environment for qca design 391
On the effects of intra-gate resistive open defects in gates at nanoscaled CMOS 387
Lifetime reliability analysis of complementary resistive switches under threshold and doping interface speed variations 386
High-reliability fault tolerant digital systems in nanometric technologies: Characterization and design methodologies 386
On the analysis of reed solomon coding for resilience to transient/permanent faults in highly reliable memories 385
Tile-based QCA design using majority-like logic primitives 384
A signed digit adder with error correction and graceful degradation capabilities 378
Tile-based QCA design 377
FastTag: a technique to protect cache tags against soft errors 376
Guest Editorial: IEEE Transactions on Computers and IEEE Transactions on Emerging Topics in Computing Joint Special Section on Innovation in Reconfigurable Computing Fabrics from Devices to Architectures 376
Error detection and correction in content addressable memories 374
Novel designs for thermally robust coplanar crossing in QCA 374
A Novel Write-Scheme For Data Integrity In Memristor-Based Crossbar Memories 374
Design of a nanometric CMOS memory cell for hardening to a single event with a multiple node upset 374
Modeling open defects in nanometric scale CMOS 373
An HDL model of magnetic quantum-dot cellular automata devices and circuits 372
Low-cost single error correction multiple adjacent error correction codes 371
Modeling QCA defects at molecular-level in combinational circuits 364
Reliable gas sensing with memristive array 364
Estimating the manufacturing yield of compiler-based embedded SRAMs 360
Racetrack logic 358
Markov Models of Fault-Tolerant Memory Systems under SEU 353
Introducing MEDIAN: A new COST Action on manufacturable and dependable multicore architectures at nanoscale 349
Error detection in ternary CAMs using bloom filters 348
Efficient implementation of error correction codes in hash tables 343
Totale 42.228
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Categoria #
all - tutte 111.500
article - articoli 0
book - libri 0
conference - conferenze 0
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 0
Totale 111.500
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Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2020/2021460 0 0 0 0 0 0 0 0 0 139 258 63
2021/20221.322 81 173 29 39 34 95 71 54 107 123 106 410
2022/20231.383 194 106 64 126 85 354 150 118 80 4 61 41
2023/2024436 54 15 32 11 45 128 21 1 10 16 3 100
2024/20253.167 74 659 399 174 50 135 228 126 473 209 334 306
2025/20264.900 487 238 650 327 328 136 758 527 813 636 0 0
Totale 50.314