Recent trends in emerging nonvolatile memory systems necessitate efficient read/write (R/W) schemes. Efficient solutions with zero sneak path current, nondestructive R/W operations, minimum area and low power are some of the key requirements. Toward this end, we propose a novel crossbar memory scheme using a configuration row of cells for assisting R/W operations. The proposed write scheme minimizes the overall power consumption compared to the previously proposed write schemes and reduces the state drift problem. We also propose two read schemes, namely, assisted-restoring and self-resetting read. In assisted-restoring scheme, we use the configuration cells which are used in the write scheme, whereas we implement additional circuitry for self-reset which addresses the problem of destructive read. Moreover, by formulating an analytical model of R/W operation, we compare the various schemes. The overhead for the proposed assisted-restoring write/read scheme is an extra redundant row for the given crossbar array. For a typical array size of 200 × 200 the area overhead is about 0.5%, however, there is a 4X improvement in power consumption compared to the recently proposed write schemes. Quantitative analysis of the proposed scheme is analyzed by using simulation and analytical models.
Yang, Y., Mathew, J., Ottavi, M., Pontarelli, S., & Pradhan, D.k. (2015). Novel Complementary Resistive Switch Crossbar Memory Write and Read Schemes. IEEE TRANSACTIONS ON NANOTECHNOLOGY, 14(2), 346-357.
|Tipologia:||Articolo su rivista|
|Citazione:||Yang, Y., Mathew, J., Ottavi, M., Pontarelli, S., & Pradhan, D.k. (2015). Novel Complementary Resistive Switch Crossbar Memory Write and Read Schemes. IEEE TRANSACTIONS ON NANOTECHNOLOGY, 14(2), 346-357.|
|Settore Scientifico Disciplinare:||Settore ING-INF/01 - Elettronica|
|Revisione (peer review):||Esperti anonimi|
|Digital Object Identifier (DOI):||http://dx.doi.org/10.1109/TNANO.2015.2394450|
|Stato di pubblicazione:||Pubblicato|
|Data di pubblicazione:||2015|
|Titolo:||Novel Complementary Resistive Switch Crossbar Memory Write and Read Schemes|
|Autori:||Yang, Y; Mathew, J; Ottavi, M; Pontarelli, S; Pradhan, Dk|
|Appare nelle tipologie:||01 - Articolo su rivista|