The memristor is one among the most promising emerging technologies for enabling a new generation of Non Volatile Memories. The memristor operates faster than a Phase Change Memory (PCRAM) and has a simpler structure than a magnetic memory (MRAM), while making possible the design of cross-point structures in crossbars at very high density. The presence of sneak path currents however causes an increase in power consumption and a reduction in data integrity and performance. To overcome this issue a novel write method is proposed to reduce the effects of sneak paths. Extensive SPICE simulations are provided to evidence the advantages of the proposed method.

Ruotolo, A., Ottavi, M., Pontarelli, S., Lombardi, F. (2012). A Novel Write-Scheme For Data Integrity In Memristor-Based Crossbar Memories. In 2012 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH) (pp.168-173).

A Novel Write-Scheme For Data Integrity In Memristor-Based Crossbar Memories

OTTAVI, MARCO;PONTARELLI, SALVATORE;
2012-07-01

Abstract

The memristor is one among the most promising emerging technologies for enabling a new generation of Non Volatile Memories. The memristor operates faster than a Phase Change Memory (PCRAM) and has a simpler structure than a magnetic memory (MRAM), while making possible the design of cross-point structures in crossbars at very high density. The presence of sneak path currents however causes an increase in power consumption and a reduction in data integrity and performance. To overcome this issue a novel write method is proposed to reduce the effects of sneak paths. Extensive SPICE simulations are provided to evidence the advantages of the proposed method.
IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH)
Amsterdam, The Netherlands
2012
Rilevanza internazionale
lug-2012
Settore ING-INF/01 - ELETTRONICA
English
Article number 6464159
Intervento a convegno
Ruotolo, A., Ottavi, M., Pontarelli, S., Lombardi, F. (2012). A Novel Write-Scheme For Data Integrity In Memristor-Based Crossbar Memories. In 2012 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH) (pp.168-173).
Ruotolo, A; Ottavi, M; Pontarelli, S; Lombardi, F
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/2108/94311
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