IRIS
RE, MARCO
 Distribuzione geografica
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Continente #
NA - Nord America 24.900
AS - Asia 5.931
EU - Europa 3.296
SA - Sud America 604
AF - Africa 74
OC - Oceania 14
Continente sconosciuto - Info sul continente non disponibili 7
Totale 34.826
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Nazione #
US - Stati Uniti d'America 24.785
SG - Singapore 3.802
CN - Cina 850
IT - Italia 701
BR - Brasile 506
RU - Federazione Russa 493
DE - Germania 454
IE - Irlanda 342
VN - Vietnam 342
HK - Hong Kong 333
UA - Ucraina 305
FR - Francia 232
JP - Giappone 163
GB - Regno Unito 162
SE - Svezia 154
FI - Finlandia 121
IN - India 114
PL - Polonia 98
AT - Austria 86
KR - Corea 82
CA - Canada 65
NL - Olanda 58
AR - Argentina 36
KG - Kirghizistan 33
TR - Turchia 31
ZA - Sudafrica 31
MX - Messico 30
BD - Bangladesh 29
ES - Italia 28
IQ - Iraq 24
ID - Indonesia 22
EC - Ecuador 15
AU - Australia 13
LT - Lituania 12
UZ - Uzbekistan 11
PK - Pakistan 10
CL - Cile 9
CO - Colombia 9
PE - Perù 9
TW - Taiwan 9
CH - Svizzera 8
KE - Kenya 8
KZ - Kazakistan 8
MA - Marocco 8
PH - Filippine 8
BE - Belgio 7
IR - Iran 7
MY - Malesia 7
EG - Egitto 6
EU - Europa 6
IL - Israele 6
RO - Romania 6
VE - Venezuela 6
AE - Emirati Arabi Uniti 5
BG - Bulgaria 5
JO - Giordania 5
OM - Oman 5
SA - Arabia Saudita 5
TN - Tunisia 5
AL - Albania 4
BO - Bolivia 4
DZ - Algeria 4
GR - Grecia 4
NP - Nepal 4
PY - Paraguay 4
UY - Uruguay 4
DO - Repubblica Dominicana 3
ET - Etiopia 3
HU - Ungheria 3
SN - Senegal 3
TH - Thailandia 3
TT - Trinidad e Tobago 3
CI - Costa d'Avorio 2
CR - Costa Rica 2
GE - Georgia 2
HN - Honduras 2
LB - Libano 2
LU - Lussemburgo 2
LV - Lettonia 2
PA - Panama 2
RS - Serbia 2
SV - El Salvador 2
SY - Repubblica araba siriana 2
AF - Afghanistan, Repubblica islamica di 1
AO - Angola 1
AZ - Azerbaigian 1
BA - Bosnia-Erzegovina 1
BB - Barbados 1
BH - Bahrain 1
BN - Brunei Darussalam 1
BY - Bielorussia 1
DM - Dominica 1
GD - Grenada 1
GT - Guatemala 1
GY - Guiana 1
HR - Croazia 1
KN - Saint Kitts e Nevis 1
KW - Kuwait 1
LK - Sri Lanka 1
MT - Malta 1
Totale 34.815
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Città #
Houston 6.072
Woodbridge 5.981
Wilmington 5.758
Singapore 942
Fairfield 820
Chandler 576
Ashburn 533
Ann Arbor 481
San Jose 406
Seattle 344
Dublin 336
Beijing 330
Hong Kong 325
New York 284
Cambridge 280
Medford 245
Jacksonville 235
Rome 234
Dearborn 173
Santa Clara 173
Tokyo 141
The Dalles 134
Los Angeles 133
Ho Chi Minh City 122
Lawrence 119
Zhengzhou 99
Hanoi 82
Lauterbourg 82
Moscow 77
Nuremberg 75
Buffalo 70
Kraków 67
Munich 66
Helsinki 57
North Bergen 52
São Paulo 52
Menlo Park 48
San Diego 48
Palo Alto 41
Dallas 35
Milan 34
Vienna 34
Council Bluffs 32
London 31
Shanghai 27
Chicago 25
Orem 24
Atlanta 23
Frankfurt am Main 23
Chennai 22
Warsaw 22
Mülheim 20
Redondo Beach 20
Seoul 20
Da Nang 19
Stockholm 19
Toronto 19
Boston 18
Brooklyn 18
Johannesburg 18
Nanjing 18
Amsterdam 17
Ankara 17
Manchester 17
Marano Di Napoli 17
Montreal 17
Haiphong 16
Denver 15
Norwalk 15
Falls Church 14
Rio de Janeiro 14
San Francisco 14
Chengdu 13
Chongqing 13
Phoenix 13
Del Norte 12
Hefei 12
Madrid 12
Palakkad 12
Mumbai 11
Suzhou 11
Verona 11
Huskvarna 10
Kunming 10
Mexico City 10
Naples 10
University Park 10
Biên Hòa 9
Colorado Springs 9
Hangzhou 9
Poplar 9
Quito 9
Redwood City 9
Salt Lake City 9
Belo Horizonte 8
Cape Town 8
Curitiba 8
Guarulhos 8
Leawood 8
Mountain View 8
Totale 27.068
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Nome #
Improved large-signal model for vacuum triodes 721
Error correction codes for SEU and SEFI tolerant memory systems 614
Karatsuba implementation of FIR filters 585
High performance bit-stream decompressor for partial reconfigurable FPGAs 579
Design of large polyphase filters in the quadratic residue number system 577
Error detection in signed digit arithmetic circuit with parity checker [adder example] 576
Degrading precision arithmetic for low power signal processing 559
Compressive sensing spectrum analysis for space autonomous radio receivers 551
Butterfly and inverse butterfly nets integration on Altera NIOS-II embedded processor 540
Error detection in addition chain based ECC point multiplication 536
Degrading precision arithmetics for low-power FIR implementation 527
A reconfigurable functional unit for modular operations 489
Arithmetic/logic blocks for fine-grained reconfigurable units 487
Spiking neural networks based on LIF with latency: Simulation and synchronization effects 485
Synaptic behaviour in ZnO-rGO composites thin film memristor 481
Multiple constant multiplication through residue number system 477
A full-adder based reconfigurable architecture for fine grain applications: ADAPTO 473
A fault tolerant hardware based file system manager for solid state mass memory 472
Design and characterization of a high-safety hardware/software module for the acquisition of Eurobalise telegrams 469
Concurrent Error Detection in Reed ndash;Solomon Encoders and Decoders 466
A self-checking cell logic block for fault tolerant FPGAs 465
Hardware design of LIF with Latency neuron model with memristive STDP synapses 463
VLSI implementation of reconfigurable cells for RFU in embedded processors 456
Speed-up of RISC processor computation using ADAPTO 455
Development of a dynamic routing system for a fault tolerant solid state mass memory 454
Power efficient design of parallel/serial FIR filters in RNS 454
A fault-tolerant solid state mass memory for highly reliable instrumentation 452
Analysis of Errors and Erasures in Parity Sharing RS Codecs 449
Implementation of the AES algorithm using a reconfigurable functional unit 446
System-on-chip oriented fault-tolerant sequential systems implementation methodology 445
Comparative Evaluation of Designs for Reliable Memory Systems 433
Fine-grain reconfigurable functional unit for embedded processors 433
Hardware implementation of MPEG analysis and deblocking for video enhancement 431
Event-driven simulation of continuous-time neural networks 428
Continuous-time spiking neural networks: general paradigm and event-driven simulation 427
Design of a totally self checking signature analysis checker for finite state machines 423
Localization of faults in radix-n signed digit adders 422
Optimized implementation of RNS FIR filters based on FPGAs 421
Algorithm acceleration on LEON-2 processor using a reconfigurable bit manipulation unit 420
A Comparative Evaluation of Designs for Reliable Memory Systems 413
Data integrity evaluations of Reed Solomon codes for storage systems [solid state mass memories] 412
Fully digital intensity modulated LIDAR 412
ZnO-rGO composite thin film resistive switching device: emulating biological synapse behavior 412
Fault tolerant solid state mass memory for space applications 411
Integration of butterfly and inverse butterfly nets in embedded processors: Effects on power saving 408
AudiNect: an aid for the autonomous navigation of visually impaired people, based on virtual interface 407
Partial reconfiguration in the implementation of autonomous radio receivers for space 400
Truncated multipliers through power-gating for degrading precision arithmetic 399
FPGA implementation of a low-area/high-SFDR DDFS architecture 398
A signed digit adder with error correction and graceful degradation capabilities 378
Imprecise arithmetic for low power image processing 349
Design of a fault tolerant solid state mass memory 341
Comparison of low-complexity algorithms for real-time QRS detection using standard ECG database 327
null 323
Comparison between trigonometric and traditional DDS, in 90 nm technology 258
Setup and experimental results analysis of COTS Camera and SRAMs at the ISIS neutron facility 253
Energy consumption saving in embedded microprocessors using hardware accelerators 227
FPGA implementation of a channelizer with 2048 channels utilizing USRP-SDR platform for satellite communications 217
AW-SOM, an algorithm for high-speed learning in hardware self-organizing maps 214
TDES cryptography algorithm acceleration using a reconfigurable functional unit 208
Digital Architecture and ASIC Implementation of Wideband Delta DOR Spacecraft Onboard Tracker 201
Totally fault tolerant RNS based FIR filters 199
Q-RTS: A real-time swarm intelligence based on multi-agent Q-learning 197
An FPGA-based multi-agent reinforcement learning timing synchronizer 196
Memristive and memory impedance behavior in a photo-annealed ZnO–rGO thin-film device 196
N-dimensional approximation of Euclidean distance 196
Compressive sensing reconstruction for complex system: A hardware/software approach 193
Efficient FPGA implementation of high speed digital delay for wideband beamforming using parallel architectures 192
A wireless sensor node based on microbial fuel cell 191
An efficient hardware implementation of reinforcement learning: The q-learning algorithm 190
A new electric encoder position estimator based on the Chinese Remainder Theorem for the CMG performance improvements 188
Approximated computing for low power neural networks 186
Analog chain calibration in Digital Beam-Forming applications 185
Dynamically-loaded Hardware Libraries (HLL) technology for audio applications 185
IP generator tool for efficient hardware acceleration of self-organizing maps 181
A hardware framework for on-chip FPGA acceleration 179
A Power Efficient Digital Front-End for Cognitive Radio Systems 175
Flexible channel extractor for wideband systems based on polyphase filter bank 171
Hardware prototyping and validation of a W-ΔDOR digital signal processor 165
RNS applications in digital signal processing 165
Twenty years of research on RNS for DSP: Lessons learned and future perspectives 159
Robust throughput boosting for low latency dynamic partial reconfiguration 157
Comparison and implementation of variable fractional delay filters for wideband digital beamforming 150
Acoustic Emissions Detection and Ranging of Cracks in Metal Tanks Using Deep Learning 149
Design and FPGA Implementation of a Low Power OFDM Transmitter for Narrow-Band IoT 146
Design space exploration based methodology for residue number system digital filters implementation 143
M-PSK demodulator with joint carrier and timing recovery 141
Approximated Canonical Signed Digit for Error Resilient Intelligent Computation 140
null 123
A Parallel hardware implementation for 2D hierarchical clustering based on fuzzy logic 120
Efficient digital implementation of a multirate-based variable fractional delay filter for wideband beamforming 120
A RISC-V Hardware Accelerator for Q-Learning Algorithm 115
Design Space Exploration for Edge machine learning featured by MathWorks FPGA DL Processor: a survey 114
A M-PSK Timing Recovery Loop Based on Q-Learning 113
ADAPTO: Full-adder based reconfigurable architecture for bit level operations 108
Multi-agent reinforcement learning: a review of challenges and applications 107
FPGA implementation of a low-power QRS extractor 106
A pseudo-softmax function for hardware-based high speed image classification 104
A Q-learning based PSK symbol synchronizer 104
A reinforcement learning-based QAM/PSK symbol synchronizer 103
Totale 32.461
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Categoria #
all - tutte 91.559
article - articoli 0
book - libri 0
conference - conferenze 0
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 0
Totale 91.559
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Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2020/2021337 0 0 0 0 0 0 0 0 0 107 168 62
2021/20221.312 46 112 23 53 42 106 46 48 292 66 47 431
2022/20231.448 148 159 80 117 130 328 123 74 117 13 112 47
2023/2024771 65 17 30 29 70 260 57 34 31 38 59 81
2024/20255.129 103 679 422 170 77 162 187 255 279 201 1.478 1.116
2025/20264.783 477 261 578 416 511 192 660 548 614 526 0 0
Totale 35.291