We propose a Q-Learning hardware accelerator for a RISC-V platform. In particular, our work focuses on the Klessydra processor. To the best of our knowledge, this is the first work in the literature that addresses this topic. We implemented the system on an AMD-Xilinx ZedBoard development board using a small amount of hardware resources and requiring a limited dynamic power of 1.528 W. The data we obtained are compatible with the future implementation of more accelerators on the same device to enhance the capabilities of the system. Compared to a standard software version of the algorithm, our accelerator allows a speed-up of × 36 in convergence time and an energy saving of × 34. The results obtained prove how our proposed system is suitable for high-speed and low-energy applications like Edge Machine Learning and embedded IoT systems.

Angeloni, D., Canese, L., Cardarilli, G.c., Di Nunzio, L., Re, M., Spano, S. (2024). A RISC-V Hardware Accelerator for Q-Learning Algorithm. In Applications in Electronics Pervading Industry, Environment and Society: APPLEPIES 2023 (pp.74-79). Cham : Springer Cham [10.1007/978-3-031-48121-5_11].

A RISC-V Hardware Accelerator for Q-Learning Algorithm

Canese L.;Cardarilli G. C.;Di Nunzio L.;Re M.;Spano S.
2024-01-01

Abstract

We propose a Q-Learning hardware accelerator for a RISC-V platform. In particular, our work focuses on the Klessydra processor. To the best of our knowledge, this is the first work in the literature that addresses this topic. We implemented the system on an AMD-Xilinx ZedBoard development board using a small amount of hardware resources and requiring a limited dynamic power of 1.528 W. The data we obtained are compatible with the future implementation of more accelerators on the same device to enhance the capabilities of the system. Compared to a standard software version of the algorithm, our accelerator allows a speed-up of × 36 in convergence time and an energy saving of × 34. The results obtained prove how our proposed system is suitable for high-speed and low-energy applications like Edge Machine Learning and embedded IoT systems.
International Conference on Applications in Electronics Pervading Industry, Environment and Society, APPLEPIES 2023
Genova, Italia
2023
Rilevanza internazionale
2024
Settore ING-INF/01
English
Edge machine learning
Hardware acceleration
Q-learning
Reinforcement learning
RISC-V
Intervento a convegno
Angeloni, D., Canese, L., Cardarilli, G.c., Di Nunzio, L., Re, M., Spano, S. (2024). A RISC-V Hardware Accelerator for Q-Learning Algorithm. In Applications in Electronics Pervading Industry, Environment and Society: APPLEPIES 2023 (pp.74-79). Cham : Springer Cham [10.1007/978-3-031-48121-5_11].
Angeloni, D; Canese, L; Cardarilli, Gc; Di Nunzio, L; Re, M; Spano, S
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/2108/364043
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