In the past decades, the Residue Number System (RNS) has been adopted in DSP as an alternative to the traditional two’s complement number system (TCS) because of the savings in area and power dissipation. In this work, we first perform a comprehensive Design Space Exploration (DSE) to analyze the impact of state-of-the-art design tools and libraries on the implementation of the basic operations (i.e., addition and multiplication) used in DSP. From this DSE, we extract the characteristics of the stand-alone RNS and TCS operators in the different design corners, independently of the specific context of the application. Then, we propose a design methodology, based on the DSE, to fully automate the design of digital filters, hiding the detail of the RNS to the designer, and providing optimal power efficient implementations. Our methodology can enable the efficiency in computation (speed and power) in DSP and in emerging applications, such as Machine Learning and Internet-of-ThingsIn the paper, a detailed description of the architecture is given and an extensive analysis of the approximation error is performed by using both custom stimuli and real‑world Convolutional Neural Networks inputs. The implementation results, based on CMOS standard‑cell technology, compared to state‑of‑the‑art architectures show reduced approximation errors.
Cardarilli, G.c., Di Nunzio, L., Fazzolari, R., Nannarelli, A., Petricca, M., Re, M. (2022). Design space exploration based methodology for residue number system digital filters implementation. IEEE TRANSACTIONS ON EMERGING TOPICS IN COMPUTING, 10(1), 186-198 [10.1109/TETC.2020.2997067].
Design space exploration based methodology for residue number system digital filters implementation
Cardarilli G. C.;Di Nunzio L.;Fazzolari R.;Re M.
2022-01-01
Abstract
In the past decades, the Residue Number System (RNS) has been adopted in DSP as an alternative to the traditional two’s complement number system (TCS) because of the savings in area and power dissipation. In this work, we first perform a comprehensive Design Space Exploration (DSE) to analyze the impact of state-of-the-art design tools and libraries on the implementation of the basic operations (i.e., addition and multiplication) used in DSP. From this DSE, we extract the characteristics of the stand-alone RNS and TCS operators in the different design corners, independently of the specific context of the application. Then, we propose a design methodology, based on the DSE, to fully automate the design of digital filters, hiding the detail of the RNS to the designer, and providing optimal power efficient implementations. Our methodology can enable the efficiency in computation (speed and power) in DSP and in emerging applications, such as Machine Learning and Internet-of-ThingsIn the paper, a detailed description of the architecture is given and an extensive analysis of the approximation error is performed by using both custom stimuli and real‑world Convolutional Neural Networks inputs. The implementation results, based on CMOS standard‑cell technology, compared to state‑of‑the‑art architectures show reduced approximation errors.| File | Dimensione | Formato | |
|---|---|---|---|
|
Design_Space_Exploration_Based_Methodology_for_Residue_Number_System_Digital_Filters_Implementation.pdf
solo utenti autorizzati
Tipologia:
Versione Editoriale (PDF)
Licenza:
Copyright dell'editore
Dimensione
1.67 MB
Formato
Adobe PDF
|
1.67 MB | Adobe PDF | Visualizza/Apri Richiedi una copia |
I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.


