Cardarilli, G.c., Di Nunzio, L., Fazzolari, R., Lenci, C., Re, M. (2010). VLSI implementation of reconfigurable cells for RFU in embedded processors. In Electronics, Circuits, and Systems (ICECS), 2010 17th IEEE International Conference on (pp.1180-1183). IEEE [10.1109/ICECS.2010.5724728].

VLSI implementation of reconfigurable cells for RFU in embedded processors

CARDARILLI, GIAN CARLO;Di Nunzio, L;RE, MARCO
2010-01-01

Electronics, Circuits, and Systems (ICECS), 2010 17th IEEE International Conference on
Athens, Greeece
2010
IEEE
Rilevanza internazionale
contributo
2010
Settore ING-INF/01 - ELETTRONICA
English
RFU;VLSI implementation;delay consumption;elementary reconfigurable cell array;embedded processors;exhaustive evaluation;full adder;layout design;look-up tables;power consumption;standard microprocessors;VLSI;adders;integrated circuit layout;microprocessor chips;table lookup;
Intervento a convegno
Cardarilli, G.c., Di Nunzio, L., Fazzolari, R., Lenci, C., Re, M. (2010). VLSI implementation of reconfigurable cells for RFU in embedded processors. In Electronics, Circuits, and Systems (ICECS), 2010 17th IEEE International Conference on (pp.1180-1183). IEEE [10.1109/ICECS.2010.5724728].
Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Lenci, C; Re, M
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/2108/24027
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