IRIS
CARDARILLI, GIAN CARLO
 Distribuzione geografica
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Continente #
NA - Nord America 30.118
AS - Asia 6.922
EU - Europa 4.074
SA - Sud America 706
AF - Africa 79
OC - Oceania 18
Continente sconosciuto - Info sul continente non disponibili 9
Totale 41.926
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Nazione #
US - Stati Uniti d'America 29.940
SG - Singapore 4.294
CN - Cina 1.014
IT - Italia 908
RU - Federazione Russa 598
BR - Brasile 586
DE - Germania 538
VN - Vietnam 409
HK - Hong Kong 406
IE - Irlanda 397
UA - Ucraina 371
FR - Francia 280
SE - Svezia 215
GB - Regno Unito 205
JP - Giappone 189
FI - Finlandia 140
IN - India 130
BD - Bangladesh 125
PL - Polonia 125
AT - Austria 108
CA - Canada 104
KR - Corea 94
NL - Olanda 69
AR - Argentina 43
ES - Italia 36
MX - Messico 36
KG - Kirghizistan 35
ZA - Sudafrica 34
TR - Turchia 30
IQ - Iraq 26
ID - Indonesia 24
PK - Pakistan 23
EC - Ecuador 18
AU - Australia 17
BE - Belgio 15
LT - Lituania 14
CH - Svizzera 13
CL - Cile 13
CO - Colombia 13
UZ - Uzbekistan 12
PH - Filippine 11
MY - Malesia 10
TW - Taiwan 10
IR - Iran 9
OM - Oman 9
PE - Perù 9
KE - Kenya 8
KZ - Kazakistan 8
NP - Nepal 8
VE - Venezuela 8
AE - Emirati Arabi Uniti 7
BG - Bulgaria 7
EG - Egitto 7
EU - Europa 7
IL - Israele 7
MA - Marocco 7
TN - Tunisia 7
BO - Bolivia 6
JO - Giordania 6
RO - Romania 6
CR - Costa Rica 5
DO - Repubblica Dominicana 5
HN - Honduras 5
SA - Arabia Saudita 5
DZ - Algeria 4
GR - Grecia 4
HU - Ungheria 4
JM - Giamaica 4
PY - Paraguay 4
UY - Uruguay 4
AL - Albania 3
GT - Guatemala 3
LB - Libano 3
PA - Panama 3
SN - Senegal 3
SV - El Salvador 3
TH - Thailandia 3
BB - Barbados 2
CI - Costa d'Avorio 2
DM - Dominica 2
ET - Etiopia 2
GE - Georgia 2
HR - Croazia 2
LU - Lussemburgo 2
LV - Lettonia 2
MD - Moldavia 2
MN - Mongolia 2
NO - Norvegia 2
PS - Palestinian Territory 2
RS - Serbia 2
SX - ???statistics.table.value.countryCode.SX??? 2
SY - Repubblica araba siriana 2
TT - Trinidad e Tobago 2
AF - Afghanistan, Repubblica islamica di 1
AO - Angola 1
AZ - Azerbaigian 1
BA - Bosnia-Erzegovina 1
BH - Bahrain 1
BN - Brunei Darussalam 1
BY - Bielorussia 1
Totale 41.908
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Città #
Woodbridge 7.241
Houston 7.156
Wilmington 6.734
Singapore 1.251
Fairfield 999
Ashburn 686
Chandler 661
Ann Arbor 634
San Jose 552
Seattle 414
Hong Kong 396
Beijing 393
Dublin 391
New York 353
Cambridge 335
Rome 296
Jacksonville 292
Medford 291
Dearborn 228
Santa Clara 214
Los Angeles 177
Tokyo 165
The Dalles 159
Ho Chi Minh City 143
Lawrence 140
Zhengzhou 111
Hanoi 97
Buffalo 93
Council Bluffs 91
Lauterbourg 91
Moscow 91
Kraków 88
Nuremberg 88
Munich 71
North Bergen 64
Helsinki 63
São Paulo 61
Milan 60
San Diego 60
Menlo Park 55
Palo Alto 44
Dallas 42
London 40
Vienna 40
Chicago 36
Mülheim 30
Frankfurt am Main 29
Orem 29
Toronto 29
Chennai 27
Warsaw 27
Montreal 26
Shanghai 26
Atlanta 25
Da Nang 25
Brooklyn 24
Nanjing 24
Stockholm 24
Phoenix 22
Boston 21
Manchester 21
Redondo Beach 21
Amsterdam 20
Seoul 20
Johannesburg 19
Del Norte 18
Marano Di Napoli 18
Norwalk 18
San Francisco 18
Denver 17
Haiphong 17
Ankara 16
Chongqing 16
Falls Church 15
Hefei 15
Rio de Janeiro 15
Salt Lake City 15
Suzhou 15
Chengdu 14
Colorado Springs 14
Madrid 14
Mexico City 14
Naples 14
University Park 14
Boardman 13
Islamabad 13
Las Vegas 12
Mumbai 12
Palakkad 12
Verona 12
Washington 12
Belo Horizonte 11
Brussels 11
Huskvarna 11
Kunming 11
Poplar 11
Redwood City 11
Curitiba 10
Hangzhou 10
Paris 10
Totale 32.655
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Nome #
Improved large-signal model for vacuum triodes 729
Error correction codes for SEU and SEFI tolerant memory systems 614
Karatsuba implementation of FIR filters 586
High performance bit-stream decompressor for partial reconfigurable FPGAs 580
Design of large polyphase filters in the quadratic residue number system 579
Error detection in signed digit arithmetic circuit with parity checker [adder example] 578
Degrading precision arithmetic for low power signal processing 561
Compressive sensing spectrum analysis for space autonomous radio receivers 555
Butterfly and inverse butterfly nets integration on Altera NIOS-II embedded processor 542
Error detection in addition chain based ECC point multiplication 541
A New hardware/software platform and a new 1/E neutron source for soft error studies: testing FPGAs at the ISIS facility 534
Degrading precision arithmetics for low-power FIR implementation 529
A reconfigurable functional unit for modular operations 494
Arithmetic/logic blocks for fine-grained reconfigurable units 489
Spiking neural networks based on LIF with latency: Simulation and synchronization effects 487
Bit flip injection in processor-based architectures: a case study 484
Synaptic behaviour in ZnO-rGO composites thin film memristor 484
Design and characterization of a high-safety hardware/software module for the acquisition of Eurobalise telegrams 481
Multiple constant multiplication through residue number system 478
Describing different brain computer interface systems through a unique model: a UML implementation 477
A full-adder based reconfigurable architecture for fine grain applications: ADAPTO 475
Analysis and evaluations of reliability of reconfigurable FPGAs 473
A fault tolerant hardware based file system manager for solid state mass memory 472
Sistemi elettronici tolleranti ai guasti per applicazioni spaziali 469
Hardware design of LIF with Latency neuron model with memristive STDP synapses 467
Concurrent Error Detection in Reed ndash;Solomon Encoders and Decoders 466
A self-checking cell logic block for fault tolerant FPGAs 465
VLSI implementation of reconfigurable cells for RFU in embedded processors 459
Speed-up of RISC processor computation using ADAPTO 458
Development of an evaluation model for the design of fault-tolerant solid state mass memory 456
Power efficient design of parallel/serial FIR filters in RNS 456
Development of a dynamic routing system for a fault tolerant solid state mass memory 455
A fault-tolerant 176 GBit solid state mass memory architecture 454
A fault-tolerant solid state mass memory for highly reliable instrumentation 453
Analysis of Errors and Erasures in Parity Sharing RS Codecs 449
Implementation of the AES algorithm using a reconfigurable functional unit 448
System-on-chip oriented fault-tolerant sequential systems implementation methodology 448
Performances evaluation and optimization of brain computer interface systems in a copy spelling task 446
Comparative Evaluation of Designs for Reliable Memory Systems 441
Evaluation of the performances of different P300 based brain-computer interfaces by means of the efficiency metric 439
Event-driven simulation of continuous-time neural networks 439
Fine-grain reconfigurable functional unit for embedded processors 435
Hardware implementation of MPEG analysis and deblocking for video enhancement 434
Continuous-time spiking neural networks: general paradigm and event-driven simulation 433
Very efficient VLSI implementation of CNN with discrete templates 430
Design of a totally self checking signature analysis checker for finite state machines 429
Algorithm acceleration on LEON-2 processor using a reconfigurable bit manipulation unit 423
Localization of faults in radix-n signed digit adders 423
Optimized implementation of RNS FIR filters based on FPGAs 421
ZnO-rGO composite thin film resistive switching device: emulating biological synapse behavior 418
Fault tolerant solid state mass memory for space applications 416
A Comparative Evaluation of Designs for Reliable Memory Systems 415
Data integrity evaluations of Reed Solomon codes for storage systems [solid state mass memories] 412
Fully digital intensity modulated LIDAR 412
Integration of butterfly and inverse butterfly nets in embedded processors: Effects on power saving 411
Efficiency of a BCI system in a visual P300 protocol with different stimulation intervals 406
Truncated multipliers through power-gating for degrading precision arithmetic 401
Partial reconfiguration in the implementation of autonomous radio receivers for space 401
FPGA implementation of a low-area/high-SFDR DDFS architecture 399
Evaluating data integrity of memory systems by configurable Markov models 395
A signed digit adder with error correction and graceful degradation capabilities 379
Imprecise arithmetic for low power image processing 351
Design of a fault tolerant solid state mass memory 344
Comparison of low-complexity algorithms for real-time QRS detection using standard ECG database 329
null 323
SMARTBENCH: QUANDO LA SICUREZZA NEGLI STABILIMENTI INDUSTRIALI DIVENTA SMART 285
Comparison between trigonometric and traditional DDS, in 90 nm technology 262
Channel estimation for high speed unmanned aerial vehicle with STBC in MIMO radio links 257
Setup and experimental results analysis of COTS Camera and SRAMs at the ISIS neutron facility 254
Energy consumption saving in embedded microprocessors using hardware accelerators 229
AW-SOM, an algorithm for high-speed learning in hardware self-organizing maps 225
TDES cryptography algorithm acceleration using a reconfigurable functional unit 208
Digital Architecture and ASIC Implementation of Wideband Delta DOR Spacecraft Onboard Tracker 203
An FPGA-based multi-agent reinforcement learning timing synchronizer 202
Totally fault tolerant RNS based FIR filters 201
N-dimensional approximation of Euclidean distance 199
Efficient FPGA implementation of high speed digital delay for wideband beamforming using parallel architectures 198
Q-RTS: A real-time swarm intelligence based on multi-agent Q-learning 198
A wireless sensor node based on microbial fuel cell 198
Memristive and memory impedance behavior in a photo-annealed ZnO–rGO thin-film device 197
Compressive sensing reconstruction for complex system: A hardware/software approach 195
An efficient hardware implementation of reinforcement learning: The q-learning algorithm 192
A new electric encoder position estimator based on the Chinese Remainder Theorem for the CMG performance improvements 190
Approximated computing for low power neural networks 188
Analog chain calibration in Digital Beam-Forming applications 187
Dynamically-loaded Hardware Libraries (HLL) technology for audio applications 187
A hardware framework for on-chip FPGA acceleration 182
A Power Efficient Digital Front-End for Cognitive Radio Systems 176
Flexible channel extractor for wideband systems based on polyphase filter bank 172
UAV Channel Estimation with STBC in MIMO Systems 171
RNS applications in digital signal processing 168
Hardware prototyping and validation of a W-ΔDOR digital signal processor 166
Twenty years of research on RNS for DSP: Lessons learned and future perspectives 162
Robust throughput boosting for low latency dynamic partial reconfiguration 159
Comparison and implementation of variable fractional delay filters for wideband digital beamforming 150
A survey on deep learning hardware accelerators for heterogeneous HPC platforms 149
Acoustic Emissions Detection and Ranging of Cracks in Metal Tanks Using Deep Learning 149
Design and FPGA Implementation of a Low Power OFDM Transmitter for Narrow-Band IoT 147
Design space exploration based methodology for residue number system digital filters implementation 145
M-PSK demodulator with joint carrier and timing recovery 143
Totale 36.724
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Categoria #
all - tutte 113.129
article - articoli 0
book - libri 0
conference - conferenze 0
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 0
Totale 113.129
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Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2021/20221.582 57 134 48 64 46 130 55 52 325 103 57 511
2022/20231.685 178 182 88 136 144 388 141 84 141 16 126 61
2023/2024890 75 21 37 32 79 297 65 36 32 42 84 90
2024/20255.726 123 834 495 204 92 180 222 291 330 253 1.530 1.172
2025/20266.414 572 313 675 538 662 246 830 675 730 635 266 272
2026/202780 80 0 0 0 0 0 0 0 0 0 0 0
Totale 42.464