IRIS

Sfoglia per Autore  

Opzioni
Mostrati risultati da 1 a 100 di 147
Data di pubblicazione Titolo Autore(i) Tipo File
1-gen-1992 VLSI RNS Implementation of fast IIR filters Cardarilli, Gc; Lojacono, R; Salerno, M; Sargeni, F Intervento a convegno
1-gen-1993 Very efficient VLSI implementation of CNN with discrete templates Cardarilli, Gc; Sargeni, F Articolo su rivista
1-gen-2000 Development of an evaluation model for the design of fault-tolerant solid state mass memory Cardarilli, Gc; Marinucci, P; Salsano, A Intervento a convegno
1-gen-2000 A fault-tolerant 176 GBit solid state mass memory architecture Cardarilli, Gc; Marinucci, P; Ottavi, M; Salsano, A Intervento a convegno
1-gen-2001 System-on-chip oriented fault-tolerant sequential systems implementation methodology Pontarelli, S; Cardarilli, Gc; Malvoni, A; Ottavi, M; Re, M; Salsano, A Intervento a convegno
1-gen-2001 Development of a dynamic routing system for a fault tolerant solid state mass memory Ottavi, M; Cardarilli, Gc; Marinucci, P; Pontarelli, S; Re, M; Salsano, A Intervento a convegno
1-gen-2001 Design of a totally self checking signature analysis checker for finite state machines Ottavi, M; Cardarilli, Gc; Cellitti, D; Pontarelli, S; Re, M; Salsano, A Intervento a convegno
1-giu-2001 Sistemi elettronici tolleranti ai guasti per applicazioni spaziali Bertazzoni, S; Cardarilli, Gc; DI GIOVENALE, D; Ottavi, M; Pontarelli, S; Salsano, A; Marinucci, P Articolo su rivista
1-gen-2002 Bit flip injection in processor-based architectures: a case study Cardarilli, Gc; Kaddour, F; Leandri, A; Ottavi, M; Pontarelli, S; Velazco, R Intervento a convegno
1-gen-2002 A self-checking cell logic block for fault tolerant FPGAs Pontarelli, S; Cardarilli, Gc; Leandri, A; Ottavi, M; Re, M; Salsano, A Intervento a convegno
1-gen-2003 Error detection in signed digit arithmetic circuit with parity checker [adder example] Cardarilli, Gc; Ottavi, M; Pontarelli, S; Re, M; Salsano, A Intervento a convegno
1-gen-2003 A fault tolerant hardware based file system manager for solid state mass memory Cardarilli, Gc; Ottavi, M; Pontarelli, S; Re, M; Salsano, A Intervento a convegno
1-gen-2003 Design of a fault tolerant solid state mass memory Cardarilli, Gc; Leandri, A; Marinucci, P; Ottavi, M; Pontarelli, S; Re, M; Salsano, A Articolo su rivista
1-gen-2004 Data integrity evaluations of Reed Solomon codes for storage systems [solid state mass memories] Cardarilli, Gc; Ottavi, M; Pontarelli, S; Re, M; Salsano, A Intervento a convegno
1-gen-2004 A fault-tolerant solid state mass memory for highly reliable instrumentation Cardarilli, Gc; Ottavi, M; Pontarelli, S; Re, M; Salsano, A Intervento a convegno
1-gen-2004 A signed digit adder with error correction and graceful degradation capabilities Cardarilli, Gc; Ottavi, M; Pontarelli, S; Re, M; Salsano, A Intervento a convegno
1-gen-2005 Comparative Evaluation of Designs for Reliable Memory Systems Cardarilli, Gc; Lombardi, F; Ottavi, M; Pontarelli, S; Re, M; Salsano, A Articolo su rivista
1-gen-2005 Fault tolerant solid state mass memory for space applications Cardarilli, Gc; Ottavi, M; Pontarelli, S; Re, M; Salsano, A Articolo su rivista
1-gen-2005 A Comparative Evaluation of Designs for Reliable Memory Systems Cardarilli, Gc; Lombardi, F; Ottavi, M; Pontarelli, S; Re, M; Salsano, A Articolo su rivista
1-mag-2005 Evaluating data integrity of memory systems by configurable Markov models Ottavi, M; Pontarelli, S; Schiano, L; Cardarilli, Gc; Lombardi, F Intervento a convegno
1-gen-2006 Fault localization, error correction, and graceful degradation in radix 2 signed digit-based adders Cardarilli, Gc; Ottavi, M; Pontarelli, S; Re, M; Salsano, A Articolo su rivista
1-gen-2006 Localization of faults in radix-n signed digit adders Cardarilli, Gc; Ottavi, M; Pontarelli, S; Re, M; Salsano, A Intervento a convegno
1-gen-2007 Hardware implementation of an echo-canceller for DVB-T on-channel repeaters Altamura, P; Cardarilli, Gc; Re, M; Del Re, A Intervento a convegno
1-gen-2007 Moving towards a hardware implementation of the independent component analysis for brain computer interfaces Malatesta, A; Quitadamo, Lr; Abbafati, M; Bianchi, L; Marciani, Mg; Cardarilli, Gc Intervento a convegno
1-gen-2007 Performances evaluation and optimization of brain computer interface systems in a copy spelling task Bianchi, L; Quitadamo, L; Garreffa, G; Cardarilli, Gc; Marciani, Mg Articolo su rivista
1-gen-2007 Analysis of Errors and Erasures in Parity Sharing RS Codecs Cardarilli, Gc; Pontarelli, S; Re, M; Salsano, A Articolo su rivista
1-gen-2007 Concurrent Error Detection in Reed ndash;Solomon Encoders and Decoders Cardarilli, Gc; Pontarelli, S; Re, M; Salsano, A Articolo su rivista
1-gen-2007 A New hardware/software platform and a new 1/E neutron source for soft error studies: testing FPGAs at the ISIS facility Violante, M; Sterpone, L; Manuzzato, A; Gerardin, S; Rech, P; Bagatin, M; Paccagnella, A; Andreani, C; Gorini, G; Pietropaolo, A; Cardarilli, Gc; Pontarelli, S; Frost, C Articolo su rivista
1-gen-2007 Optimization of self checking FIR filters by means of fault injection analysis Pontarelli, S; Sterpone, L; Cardarilli, Gc; Re, M; Reorda, Ms; Salsano, A; Violante, M Intervento a convegno
1-gen-2007 Low-power adaptive filter based on RNS components Bernocchi, Gl; Cardarilli, Gc; Del Re, A; Nannarell, A; Re, M Intervento a convegno
1-gen-2007 Impact of RNS coding overhead on FIR filters performance Cardarilli, Gc; Del Re, A; Nannarelli, A; Re, M Intervento a convegno
1-gen-2007 Self checking circuit optimization by means of fault injection analysis: A case study on reed solomon decoders Pontarelli, S; Sterpone, L; Cardarilli, Gc; Re, M; Reorda, Ms; Salsano, A; Violante, M Intervento a convegno
1-gen-2007 Residue number system for low-power DSP applications Cardarilli, Gc; Nannarelli, A; Re, M Intervento a convegno
1-gen-2008 A UML model for the description of different brain-computer interface systems Quitadamo, Lr; Abbafati, M; Saggio, G; Marciani, Mg; Cardarilli, Gc; Bianchi, L Intervento a convegno
1-gen-2008 Analysis and evaluations of reliability of reconfigurable FPGAs Pontarelli, S; Ottavi, M; Vankamamidi, V; Cardarilli, Gc; Lombardi, F; Salsano, A Articolo su rivista
1-gen-2008 Describing different brain computer interface systems through a unique model: a UML implementation Quitadamo, L; Marciani, Mg; Cardarilli, Gc; Bianchi, L Articolo su rivista
1-gen-2008 A full-adder based reconfigurable architecture for fine grain applications: ADAPTO Cardarilli, Gc; Di Nunzio, L; Re, M Intervento a convegno
1-gen-2008 A software defined radio architecture for a regenerative on-board processor Iacomacci, F; Morlet, C; Autelitano, F; Cardarilli, Gc; Re, M; Petrongari, E; Bogo, G; Franceschelli, M Intervento a convegno
1-gen-2008 ADAPTO: Full-adder based reconfigurable architecture for bit level operations Cardarilli, Gc; Di Nunzio, L; Re, M; Nannarelli, A Intervento a convegno
1-gen-2008 Totally fault tolerant RNS based FIR filters Pontarelli, S; Cardarilli, Gc; Re, M; Salsano, A Intervento a convegno
1-gen-2008 On the use of signed digit arithmetic for the new 6-inputs LUT based FPGAs Cardarilli, Gc; Pontarelli, S; Re, M; Salsano, A Intervento a convegno
1-gen-2008 Reducing power dissipation in pipelined accumulators Cardarilli, Gc; Nannarelli, A; Re, M Intervento a convegno
1-gen-2008 A novel error detection and correction technique for RNS based FIR filters Pontarelli, S; Cardarilli, Gc; Re, M; Salsano, A Intervento a convegno
1-gen-2009 Efficiency of a BCI system in a visual P300 protocol with different stimulation intervals Quitadamo, L; Abbafati, M; Saggio, G; Cardarilli, Gc; Marciani, Mg; Bianchi, L Intervento a convegno
1-gen-2009 Speed-up of RISC processor computation using ADAPTO Cardarilli, Gc; Di Nunzio, L; Re, M Intervento a convegno
1-gen-2009 Improved large-signal model for vacuum triodes Cardarilli, Gc; Re, M; Di Carlo, L Intervento a convegno
1-gen-2009 Multiple constant multiplication through residue number system Shuli, I; Petricca, M; Cardarilli, Gc; Nannarelli, A; Re, M Intervento a convegno
1-gen-2009 Hardware implementation of MPEG analysis and deblocking for video enhancement Petricca, M; Li, H; Forchhammer, S; Nannarelli, A; Re, M; Andersen, J; Cardarilli, Gc Intervento a convegno
1-gen-2009 Arithmetic/logic blocks for fine-grained reconfigurable units Cardarilli, Gc; Di Nunzio, L; Re, M Intervento a convegno
1-gen-2009 Error detection in addition chain based ECC point multiplication Pontarelli, S; Cardarilli, Gc; Re, M; Salsano, A Intervento a convegno
1-gen-2009 Error correction codes for SEU and SEFI tolerant memory systems Pontarelli, S; Cardarilli, Gc; Re, M; Salsano, A Intervento a convegno
1-gen-2010 VLSI implementation of reconfigurable cells for RFU in embedded processors Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Lenci, C; Re, M Intervento a convegno
1-gen-2010 Algorithm acceleration on LEON-2 processor using a reconfigurable bit manipulation unit Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Re, M Intervento a convegno
1-gen-2010 Degrading precision arithmetic for low power signal processing Petricca, M; Cardarilli, Gc; Nannarelli, A; Re, M; Albicocco, P Intervento a convegno
1-gen-2010 Butterfly and inverse butterfly nets integration on Altera NIOS-II embedded processor Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Re, M; Lee, R Intervento a convegno
1-gen-2010 Design of large polyphase filters in the quadratic residue number system Cardarilli, Gc; Nannarelli, A; Oster, Y; Petricca, M; Re, M Intervento a convegno
1-gen-2010 On the comparison of different number systems in the implementation of complex FIR filters Cardarilli, Gc; Nannarelli, A; Re, M Contributo in libro
1-gen-2011 Degrading precision arithmetics for low-power FIR implementation Albicocco, P; Cardarilli, Gc; Nannarelli, A; Petricca, M; Re, M Intervento a convegno
1-gen-2011 Fine-grain reconfigurable functional unit for embedded processors Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Re, M Intervento a convegno
1-gen-2011 FPGA implementation of a low-area/high-SFDR DDFS architecture Cardarilli, Gc; D'Alessio, M; Di Nunzio, L; Fazzolari, R; Murgia, D; Re, M Intervento a convegno
1-gen-2011 Partial reconfiguration in the implementation of autonomous radio receivers for space Cardarilli, Gc; Re, M; Shuli, I; Simone, L Intervento a convegno
1-gen-2011 Classification of complex tasks for Brain-Computer Interface Quitadamo, Lr; Mattia, D; Cincotti, F; Babiloni, F; Cardarilli, Gc; Marciani, Mg; Bianchi, L Articolo su rivista
1-gen-2011 Implementation of the AES algorithm using a reconfigurable functional unit Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Pontarelli, S; Re, M; Salsano, A Intervento a convegno
1-gen-2012 Evaluation of the performances of different P300 based brain-computer interfaces by means of the efficiency metric Quitadamo, L; Abbafati, M; Cardarilli, Gc; Mattia, D; Cincotti, F; Babiloni, F; Marciani, M; Bianchi, L Articolo su rivista
1-gen-2012 Power efficient design of parallel/serial FIR filters in RNS Petricca, M; Albicocco, P; Cardarilli, Gc; Nannarelli, A; Re, M Intervento a convegno
1-gen-2012 Integration of butterfly and inverse butterfly nets in embedded processors: Effects on power saving Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Re, M; Lee, R Intervento a convegno
1-gen-2012 Optimized implementation of RNS FIR filters based on FPGAs Pontarelli, S; Cardarilli, Gc; Re, M; Salsano, A Articolo su rivista
1-gen-2012 Karatsuba implementation of FIR filters Albicocco, P; Cardarilli, Gc; Pontarelli, S; Re, M Intervento a convegno
1-gen-2012 Imprecise arithmetic for low power image processing Albicocco, P; Cardarilli, Gc; Nannarelli, A; Petricca, M; Re, M Intervento a convegno
1-giu-2013 Continuous-time spiking neural networks: general paradigm and event-driven simulation Salerno, M; Susi, G; Cristini, A; Re, M; Cardarilli, Gc Intervento a convegno
1-nov-2013 Truncated multipliers through power-gating for degrading precision arithmetic Albicocco, P; Cardarilli, Gc; Nannarelli, A; Petricca, M; Re, M Intervento a convegno
1-nov-2013 Compressive sensing spectrum analysis for space autonomous radio receivers Cardarilli, Gc; Re, M; Shuli, I; Simone, L Intervento a convegno
1-nov-2013 Spiking neural networks based on LIF with latency: Simulation and synchronization effects Cardarilli, Gc; Cristini, A; DI NUNZIO, L; Re, M; Salerno, M; Susi, G Intervento a convegno
1-gen-2014 Event-driven simulation of continuous-time neural networks Salerno, M; Susi, G; Cristini, A; Re, M; Cardarilli, Gc Intervento a convegno
1-gen-2014 TDES cryptography algorithm acceleration using a reconfigurable functional unit Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Re, M Intervento a convegno
1-gen-2014 Twenty years of research on RNS for DSP: Lessons learned and future perspectives Albicocco, P; Cardarilli, Gc; Nannarelli, A; Re, M Intervento a convegno
1-giu-2014 High performance bit-stream decompressor for partial reconfigurable FPGAs Cardarilli, Gc; Re, M; Shuli, I Contributo in libro
1-giu-2014 A reconfigurable functional unit for modular operations Cardarilli, Gc; DI NUNZIO, L; Fazzolari, R; Pontarelli, S; Re, M Contributo in libro
1-gen-2015 Radio link design for unmanned aerial vehicles (UAVS) WITH SQAM/TQAM configuration and alamouti/STBC codes Fereidotmtabar, A; Cardarilli, Gc Articolo su rivista
1-gen-2015 A framework for dynamically-loaded hardware library (HLL) in FPGA acceleration Cardarilli, Gc; Di Carlo, L; Nannarelli, A; Pandolfi, Fm; Re, M Intervento a convegno
1-gen-2015 Characterization of RNS multiply-add units for power efficient DSP Cardarilli, Gc; Nannarelli, A; Petricca, M; Re, M Intervento a convegno
1-gen-2015 UAV Channel Estimation with STBC in MIMO Systems Fereidountabar, A; Cardarilli, Gc; Di Nunzio, L; Fazzolari, R Intervento a convegno
1-gen-2016 Fully digital intensity modulated LIDAR Pollastrone, F; Cardarilli, Gc; Pizzoferrato, R; Re, M Articolo su rivista
1-gen-2016 Design and characterization of a high-safety hardware/software module for the acquisition of Eurobalise telegrams Giuliani, F; Ottavi, M; Cardarilli, Gc; Re, M; DI NUNZIO, L; Fazzolari, R; Bruno, A; Zuliani, F Intervento a convegno
1-gen-2016 A ZnO-rGO composite thin film discrete memristor Khanal, Gm; Cardarilli, G; Chakraborty, A; Acciarito, S; Mulla, My; Di Nunzio, L; Fazzolari, R; Re, M Intervento a convegno
1-gen-2016 A hardware framework for on-chip FPGA acceleration Lomuscio, A; Cardarilli, Gc; Nannarelli, A; Re, M Intervento a convegno
1-gen-2016 Dynamically-loaded Hardware Libraries (HLL) technology for audio applications Esposito, A; Lomuscio, A; Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Nannarelli, A; Re, M Intervento a convegno
1-gen-2017 Comparison of jamming excision methods for direct sequence/spread spectrum (DS/SS) modulated signal Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Fereidountabar, A; Giuliani, F; Re, M; Simone, L Articolo su rivista
1-gen-2017 Flexible channel extractor for wideband systems based on polyphase filter bank Cappello, S; Cardarilli, Gc; di Nunzio, L; Fazzolari, R; Re, M; Albicocco, P Articolo su rivista
1-gen-2017 Synaptic behaviour in ZnO-rGO composites thin film memristor Khanal, G; Acciarito, S; Cardarilli, G; Chakraborty, A; Di Nunzio, L; Fazzolari, R; Cristini, A; Re, M; Susi, G Articolo su rivista
1-gen-2017 Robust throughput boosting for low latency dynamic partial reconfiguration Nannarelli, A; Re, M; Cardarilli, Gc; Di Nunzio, L; Brunella, Ms; Fazzolari, R; Carbonari, F Intervento a convegno
1-gen-2017 RNS applications in digital signal processing Cardarilli, Gc; Nannarelli, A; Re, M Contributo in libro
1-gen-2017 A wireless sensor node based on microbial fuel cell Acciarito, S; Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Re, M Contributo in libro
1-gen-2017 A new electric encoder position estimator based on the Chinese Remainder Theorem for the CMG performance improvements Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Gerardi, L; Re, M; Campolo, G; Cascone, D Intervento a convegno
1-gen-2017 Hardware design of LIF with Latency neuron model with memristive STDP synapses Acciarito, S; Cardarilli, Gc; Cristini, A; DI NUNZIO, L; Fazzolari, R; Khanal, G; Re, M; Susi, G Articolo su rivista
1-gen-2018 Neutron irradiation of an ARM Cortex-M0 Core Malatesta, F; Ottavi, M; Cardarilli, G; Furano, G; Menicucci, A; Cazzaniga, C; Andreani, C; Senesi, R; Scatigno, C Intervento a convegno
1-gen-2018 ZnO-rGO composite thin film resistive switching device: emulating biological synapse behavior Khanal, G; Acciarito, S; Cardarilli, Gc; Chakraborty, A; DI NUNZIO, L; Fazzolari, R; Cristini, A; Susi, G; Re, M Contributo in libro
1-gen-2018 Channel estimation for high speed unmanned aerial vehicle with STBC in MIMO radio links Fereidountabar, A; Cardarilli, Gc; Di Nunzio, L; Fazzolari, R Articolo su rivista
1-gen-2018 SMARTBENCH: QUANDO LA SICUREZZA NEGLI STABILIMENTI INDUSTRIALI DIVENTA SMART Anastasi, S; Ansaldi, Sm; Augugliaro, G; Biancolini, Me; Bragatto, P; Cardarilli, Gc; Chiappa, A; De Marchi, L; Di Condina, T; Di Nunzio, L; Faramondi, L; Fazzolari, R; Giorgetti, F; Gnoni, Mg; Marzani, A; Mennuti, C; Milazzo, Mf; Monica, L; Onorati, D; Setola, R; Testoni, N; Tommasino, P; Zanzotto, Fm Articolo su rivista
1-gen-2018 Compressive sensing reconstruction for complex system: A hardware/software approach Acciarito, S; Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Khanal, Gm; Re, M Intervento a convegno
Mostrati risultati da 1 a 100 di 147
Legenda icone

  •  file ad accesso aperto
  •  file disponibili sulla rete interna
  •  file disponibili agli utenti autorizzati
  •  file disponibili solo agli amministratori
  •  file sotto embargo
  •  nessun file disponibile