The possibility to adapt in-flight the behaviour of a space-based equipment to different operating conditions and/or new functional requirements is of paramount importance in the field of the commercial multimedia communications.Infact, in a satellite lifetime of 15 years, new standards may arise, the existing one may be upgraded, or the opportunity to introduce new addedvalue services may be considered by a satellite operator. The in-flight adaptability is particularly significant for an On-Board Processor (OBP) based on the signal regeneration: such kind of equipments, though offering excellent performances in terms of BER/PER, require an access protocol to exploit the communication resources and this condition is an heavy limitation to the OBP flexibility, usually perceived as a risk factor by a commercial satellite operator. The present paper describes a Regenerative OBP architecture which makes use of the SRAM-based FPGA technology to obtain a fully reconfigurable platform, where any functional block of the signal processing chain may be completely modified in-flight. Together with the OBP architecture, a procedure to perform an efficient and reliable payload reconfiguration is described. A prototype of the proposed OBP architecture, based on COTS devices, will be realized in the frame of an ESA/ESTEC contract. © 2008 IEEE.
Iacomacci, F., Morlet, C., Autelitano, F., Cardarilli, G.c., Re, M., Petrongari, E., et al. (2008). A software defined radio architecture for a regenerative on-board processor. In Proceedings of the 2008 NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2008 (pp.164-171). 10662 LOS VAQUEROS CIRCLE, PO BOX 3014, LOS ALAMITOS, CA 90720-1264 USA : IEEE COMPUTER SOC [10.1109/AHS.2008.37].
A software defined radio architecture for a regenerative on-board processor
Cardarilli G. C.;Re M.;
2008-01-01
Abstract
The possibility to adapt in-flight the behaviour of a space-based equipment to different operating conditions and/or new functional requirements is of paramount importance in the field of the commercial multimedia communications.Infact, in a satellite lifetime of 15 years, new standards may arise, the existing one may be upgraded, or the opportunity to introduce new addedvalue services may be considered by a satellite operator. The in-flight adaptability is particularly significant for an On-Board Processor (OBP) based on the signal regeneration: such kind of equipments, though offering excellent performances in terms of BER/PER, require an access protocol to exploit the communication resources and this condition is an heavy limitation to the OBP flexibility, usually perceived as a risk factor by a commercial satellite operator. The present paper describes a Regenerative OBP architecture which makes use of the SRAM-based FPGA technology to obtain a fully reconfigurable platform, where any functional block of the signal processing chain may be completely modified in-flight. Together with the OBP architecture, a procedure to perform an efficient and reliable payload reconfiguration is described. A prototype of the proposed OBP architecture, based on COTS devices, will be realized in the frame of an ESA/ESTEC contract. © 2008 IEEE.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
