An empirical Gate charge model for HFET suitable for implementation in CAD environments is proposed. The model consists of a single Gate charge nonlinear expression as function of two controlling voltages. Such model follows a recently published modeling approach named Current Division. A comparison is carried out between capacitance values extracted from FET measurements and modeled capacitance values derived from the proposed expression. © 2014 IEEE
Pasciuto, B., Limiti, E. (2014). Empirical Nonlinear HFET Gate Charge Model. In 2014 International Workshop on Integrated Nonlinear Microwave and Millimetre-wave Circuits (INMMiC). IEEE [10.1109/INMMIC.2014.6815071].
Empirical Nonlinear HFET Gate Charge Model
LIMITI, ERNESTO
2014-01-01
Abstract
An empirical Gate charge model for HFET suitable for implementation in CAD environments is proposed. The model consists of a single Gate charge nonlinear expression as function of two controlling voltages. Such model follows a recently published modeling approach named Current Division. A comparison is carried out between capacitance values extracted from FET measurements and modeled capacitance values derived from the proposed expression. © 2014 IEEEI documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
