This paper presents a comprehensive evaluation of GaN HEMT technology development on SiC substrates, relying on an electro-thermal model validated against DC, pulsed DC and S-parameter measurements. The measured devices are backside mounted, but the layout is also conceived for flip-chip mounting. Based on accurate estimation of the device thermal resistance, the model enables to explore and assess the device performances in both backside and flip-chip configurations; results are shown both for conventional ceramic AIN flip-chip mountings, and for advanced (diamond) heatsinks.

Angelini, A., Camarchia, V., Cappelluti, F., Donati Guerrieri, S., Pirola, M., Bonani, F., et al. (2006). Evaluation of GaN HEMT technology development through nonlinear characterization. In Proceedings of the International symposium on power semiconductor devices and ICs (pp.1-4). IEEE.

Evaluation of GaN HEMT technology development through nonlinear characterization

SERINO, ANTONIO;
2006-06-01

Abstract

This paper presents a comprehensive evaluation of GaN HEMT technology development on SiC substrates, relying on an electro-thermal model validated against DC, pulsed DC and S-parameter measurements. The measured devices are backside mounted, but the layout is also conceived for flip-chip mounting. Based on accurate estimation of the device thermal resistance, the model enables to explore and assess the device performances in both backside and flip-chip configurations; results are shown both for conventional ceramic AIN flip-chip mountings, and for advanced (diamond) heatsinks.
International symposium on power semiconductor devices and ICs (ISPSD'06)
Napoli (Italia)
2006
18.
Rilevanza internazionale
contributo
giu-2006
Settore ING-INF/01 - ELETTRONICA
English
Electro-thermal effects; GaN; Power RF FETs; Semiconductor device thermal factors
Intervento a convegno
Angelini, A., Camarchia, V., Cappelluti, F., Donati Guerrieri, S., Pirola, M., Bonani, F., et al. (2006). Evaluation of GaN HEMT technology development through nonlinear characterization. In Proceedings of the International symposium on power semiconductor devices and ICs (pp.1-4). IEEE.
Angelini, A; Camarchia, V; Cappelluti, F; Donati Guerrieri, S; Pirola, M; Bonani, F; Serino, A; Ghione, G
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/2108/50110
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