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Madeshvaradhan, V., Singh, A., Ottavi, M., Gupta, V. (2025). Design trade-offs in M-C and R-C delay architectures for secure and scalable arbiter PUFs. In 2025 5th Asian Conference on Innovation in Technology (ASIANCON) (pp.1-6). New York : IEEE [10.1109/ASIANCON66527.2025.11280891].

Design trade-offs in M-C and R-C delay architectures for secure and scalable arbiter PUFs

Ottavi, M.;Gupta, V.
2025-01-01
5th Asian Conference on Innovation in Technology (ASIANCON)
PIMPRI, India
2025
5
Rilevanza internazionale
2025
Settore IINF-01/A - Elettronica
English
Intervento a convegno
Madeshvaradhan, V., Singh, A., Ottavi, M., Gupta, V. (2025). Design trade-offs in M-C and R-C delay architectures for secure and scalable arbiter PUFs. In 2025 5th Asian Conference on Innovation in Technology (ASIANCON) (pp.1-6). New York : IEEE [10.1109/ASIANCON66527.2025.11280891].
Madeshvaradhan, V; Singh, A; Ottavi, M; Gupta, V
02 - Intervento a convegno
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/2108/463831
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