Lazzeri, E., Forlin, B.e., Furano, G., Ottavi, M., Cassano, L. (2024). An experimental comparison of RISC-V processors: performance, power, area and security: special session paper. In 2024 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) (pp.1-6). New York : IEEE [10.1109/DFT63277.2024.10753540].

An experimental comparison of RISC-V processors: performance, power, area and security: special session paper

Ottavi, M.;
2024-01-01

IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)
Didcot, United Kingdom
2024
Rilevanza internazionale
2024
Settore IINF-01/A - Elettronica
English
Intervento a convegno
Lazzeri, E., Forlin, B.e., Furano, G., Ottavi, M., Cassano, L. (2024). An experimental comparison of RISC-V processors: performance, power, area and security: special session paper. In 2024 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) (pp.1-6). New York : IEEE [10.1109/DFT63277.2024.10753540].
Lazzeri, E; Forlin, Be; Furano, G; Ottavi, M; Cassano, L
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/2108/463827
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