FPGA NICs can improve packet processing performance, however, programming them is difficult, and existing solutions to enable software packet processing on FPGA either provide limited packet processing speed, or require changes to programs and to their development/deployment life cycle.
Bonola, M., Belocchi, G., Tulumello, A., SPAZIANI BRUNELLA, M., Siracusano, G., Bianchi, G., et al. (2022). Faster Software Packet Processing on FPGA NICs with eBPF Program Warping. In Proceedings of the 2022 USENIX Annual Technical Conference (pp.987-1004). USENIX Association.
Faster Software Packet Processing on FPGA NICs with eBPF Program Warping
Marco Bonola;Giacomo Belocchi;Angelo Tulumello;Marco Spaziani Brunella;Giuseppe Siracusano;Giuseppe Bianchi;
2022-01-01
Abstract
FPGA NICs can improve packet processing performance, however, programming them is difficult, and existing solutions to enable software packet processing on FPGA either provide limited packet processing speed, or require changes to programs and to their development/deployment life cycle.File in questo prodotto:
Non ci sono file associati a questo prodotto.
I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
