In this paper a high performance VLSI implementation of a 3×3 Digitally Programmable Cellular Neural Networks with discrete templates is presented. This chip, manufactured and successfully tested, gives an efficient solution to the hardware implementation of the Cellular Neural Networks. Moreover this chip can be connected to others to carry out very large CNN arrays. This implementation covers the 66% of the available one-neighborhood fixed templates for image processing applications.
Sargeni, F., & Bonaiuto, V. (1994). High performance digitally programmable CNN chip with discrete templates. In Proceedings of the IEEE international workshop on cellular neural networks and their applications (pp.67-72). IEEE, Piscataway, NJ, United States.
Autori: | |
Autori: | Sargeni, F; Bonaiuto, V |
Titolo: | High performance digitally programmable CNN chip with discrete templates |
Nome del convegno: | Proceedings of the 3rd IEEE international workshop on cellular neural networks and their applications (CNNA-94) |
Luogo del convegno: | Rome, Italy |
Anno del convegno: | 18 December 1994 through 21 December 1994 |
Numero del convegno: | 3 |
Enti collegati al convegno: | IEEE; "La Sapienza" University of Rome;Italian National Research Council (CNR) |
Rilevanza: | Rilevanza internazionale |
Sezione: | contributo |
Data di pubblicazione: | 1994 |
Digital Object Identifier (DOI): | http://dx.doi.org/10.1109/CNNA.1994.381705 |
Settore Scientifico Disciplinare: | Settore ING-IND/31 - Elettrotecnica |
Lingua: | English |
Tipologia: | Intervento a convegno |
Citazione: | Sargeni, F., & Bonaiuto, V. (1994). High performance digitally programmable CNN chip with discrete templates. In Proceedings of the IEEE international workshop on cellular neural networks and their applications (pp.67-72). IEEE, Piscataway, NJ, United States. |
Appare nelle tipologie: | 02 - Intervento a convegno |