In this paper a high performance VLSI implementation of a 3×3 Digitally Programmable Cellular Neural Networks with discrete templates is presented. This chip, manufactured and successfully tested, gives an efficient solution to the hardware implementation of the Cellular Neural Networks. Moreover this chip can be connected to others to carry out very large CNN arrays. This implementation covers the 66% of the available one-neighborhood fixed templates for image processing applications.
Sargeni, F., Bonaiuto, V. (1994). High performance digitally programmable CNN chip with discrete templates. In Proceedings of the IEEE international workshop on cellular neural networks and their applications (pp.67-72). IEEE, Piscataway, NJ, United States [10.1109/CNNA.1994.381705].
High performance digitally programmable CNN chip with discrete templates
SARGENI, FAUSTO;BONAIUTO, VINCENZO
1994-01-01
Abstract
In this paper a high performance VLSI implementation of a 3×3 Digitally Programmable Cellular Neural Networks with discrete templates is presented. This chip, manufactured and successfully tested, gives an efficient solution to the hardware implementation of the Cellular Neural Networks. Moreover this chip can be connected to others to carry out very large CNN arrays. This implementation covers the 66% of the available one-neighborhood fixed templates for image processing applications.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
