This work presents the design and measurement results of a Monolithic Microwave Integrated Circuit (MMIC) Doherty Power Amplifier (DPA) conceived for K-band wireless applications. The amplifier is based on a two-stage architecture in which a single device drives both Carrier and Peaking final stage. The selected technology is the Gallium Nitride on Silicon Carbide (GaN-SiC) HEMT with 0.15 mu mathrm{m} gate length, supplied by WIN Semiconductors foundry. The center frequency is set to 19.65 GHz, whereas the chip area results to be 3.7 times 3 mathrm{~mm}{2}. From the preliminary experimental characterization, a good agreement between measurements and simulations has been achieved. Small-signal gain in excesses of 16 dB has been measured from 18.65 GHz to 20.65 GHz with both input and output return losses better than 10 dB. Expected nonlinear performance in terms of output power, power added efficiency (PAE) and gain at saturation and back-off level are respectively: P {text{out}, text{sat}}=36 mathrm{dBm}, P A E {text {sat }}=40 %, G {text {sat }}=13 mathrm{~dB} and P {text {out,back-off }}=30 mathrm{dBm}, PAE {text {back-off }}=25 %, mathrm{G} {text {back-off }}=14.5 mathrm{~dB}.
Furxhi, S., Marzi, S.d., Raffo, A., Giofre', R., Colantonio, P. (2022). A GaN-SiC MMIC Doherty Power Amplifier For K-band Wireless Communications. In 2022 24th International Microwave and Radar Conference, MIKON 2022 (pp.1-3). Institute of Electrical and Electronics Engineers Inc..
A GaN-SiC MMIC Doherty Power Amplifier For K-band Wireless Communications
Giofre' R.;Colantonio P.
2022-01-01
Abstract
This work presents the design and measurement results of a Monolithic Microwave Integrated Circuit (MMIC) Doherty Power Amplifier (DPA) conceived for K-band wireless applications. The amplifier is based on a two-stage architecture in which a single device drives both Carrier and Peaking final stage. The selected technology is the Gallium Nitride on Silicon Carbide (GaN-SiC) HEMT with 0.15 mu mathrm{m} gate length, supplied by WIN Semiconductors foundry. The center frequency is set to 19.65 GHz, whereas the chip area results to be 3.7 times 3 mathrm{~mm}{2}. From the preliminary experimental characterization, a good agreement between measurements and simulations has been achieved. Small-signal gain in excesses of 16 dB has been measured from 18.65 GHz to 20.65 GHz with both input and output return losses better than 10 dB. Expected nonlinear performance in terms of output power, power added efficiency (PAE) and gain at saturation and back-off level are respectively: P {text{out}, text{sat}}=36 mathrm{dBm}, P A E {text {sat }}=40 %, G {text {sat }}=13 mathrm{~dB} and P {text {out,back-off }}=30 mathrm{dBm}, PAE {text {back-off }}=25 %, mathrm{G} {text {back-off }}=14.5 mathrm{~dB}.File | Dimensione | Formato | |
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