The aim of this paper is to assess the feasibility and on-board hardware performance requirements for on-board telemetry forecasting by implementing a Recurrent Neural Network (RNN) on low-cost multicore RISC-V microprocessor. Gravity field and steady-state Ocean Circulation Explorer (GOCE) public telemetry data was used for training RNNs with different hyperparameters and architectures. The prediction accuracy of these models was evaluated using mean error and R-squared score on the same test dataset. The implementation of the RNN on a RISC-V embedded device, representative of future space-grade hardware, required some adaptations and modifications due to the computational requirements and the large memory footprint. The algorithm was implemented to run in parallel on the 8 cores of the microprocessor and tiling was employed for the weight matrices. Further considerations have also been made for the approximation of sigmoid and hyperbolic tangent as activation functions.
Cappellone, D., Di Mascio, S., Furano, G., Menicucci, A., Ottavi, M. (2020). On-Board Satellite Telemetry Forecasting with RNN on RISC-V Based Multicore Processor. In 2020 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT). 345 E 47TH ST, NEW YORK, NY 10017 USA : IEEE [10.1109/DFT50435.2020.9250796].
On-Board Satellite Telemetry Forecasting with RNN on RISC-V Based Multicore Processor
Ottavi, M
2020-01-01
Abstract
The aim of this paper is to assess the feasibility and on-board hardware performance requirements for on-board telemetry forecasting by implementing a Recurrent Neural Network (RNN) on low-cost multicore RISC-V microprocessor. Gravity field and steady-state Ocean Circulation Explorer (GOCE) public telemetry data was used for training RNNs with different hyperparameters and architectures. The prediction accuracy of these models was evaluated using mean error and R-squared score on the same test dataset. The implementation of the RNN on a RISC-V embedded device, representative of future space-grade hardware, required some adaptations and modifications due to the computational requirements and the large memory footprint. The algorithm was implemented to run in parallel on the 8 cores of the microprocessor and tiling was employed for the weight matrices. Further considerations have also been made for the approximation of sigmoid and hyperbolic tangent as activation functions.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
