Speculative parallel discrete event simulation requires a support for reversing processed events, also called state recovery, when causal inconsistencies are revealed. In this article we present an approach where state recovery relies on a mix of hardware-and software-based techniques. We exploit the Hardware Transactional Memory (HTM) support, as offered by Intel Haswell CPUs, to process events as in-memory transactions, which are possibly committed only after their causal consistency is verified. At the same time, we exploit an innovative software-based reversibility technique, fully relying on transparent software instrumentation targeting x86/ELF objects, which enables undoing side effects by events with no actual backward re-computation. Each thread within our speculative processing engine dynamically (on a per-event basis) selects which recovery mode to rely on (hardware vs software) depending on varying runtime dynamics. The latter are captured by a lightweight analytic model indicating to what extent the HTM support (not paying any instrumentation cost) is efficient, and after what level of events' parallelism it starts degrading its performance, e.g., due to excessive data conflicts while manipulating causality meta-data within HTM-based transactions. We released our implementation as open source software and provide experimental results for an assessment of its effectiveness.

Cingolani, D., Ianni, M., Pellegrini, A., Quaglia, F. (2016). Mixing hardware and software reversibility for speculative parallel discrete event simulation. In Reversible Computation (pp.137-152). GEWERBESTRASSE 11, CHAM, CH-6330, SWITZERLAND : SPRINGER INT PUBLISHING AG [10.1007/978-3-319-40578-0_9].

Mixing hardware and software reversibility for speculative parallel discrete event simulation

Alessandro Pellegrini;Francesco Quaglia
2016-07-01

Abstract

Speculative parallel discrete event simulation requires a support for reversing processed events, also called state recovery, when causal inconsistencies are revealed. In this article we present an approach where state recovery relies on a mix of hardware-and software-based techniques. We exploit the Hardware Transactional Memory (HTM) support, as offered by Intel Haswell CPUs, to process events as in-memory transactions, which are possibly committed only after their causal consistency is verified. At the same time, we exploit an innovative software-based reversibility technique, fully relying on transparent software instrumentation targeting x86/ELF objects, which enables undoing side effects by events with no actual backward re-computation. Each thread within our speculative processing engine dynamically (on a per-event basis) selects which recovery mode to rely on (hardware vs software) depending on varying runtime dynamics. The latter are captured by a lightweight analytic model indicating to what extent the HTM support (not paying any instrumentation cost) is efficient, and after what level of events' parallelism it starts degrading its performance, e.g., due to excessive data conflicts while manipulating causality meta-data within HTM-based transactions. We released our implementation as open source software and provide experimental results for an assessment of its effectiveness.
8th International Conference on Reversible Computation
Rilevanza internazionale
lug-2016
Settore ING-INF/05 - SISTEMI DI ELABORAZIONE DELLE INFORMAZIONI
English
Intervento a convegno
Cingolani, D., Ianni, M., Pellegrini, A., Quaglia, F. (2016). Mixing hardware and software reversibility for speculative parallel discrete event simulation. In Reversible Computation (pp.137-152). GEWERBESTRASSE 11, CHAM, CH-6330, SWITZERLAND : SPRINGER INT PUBLISHING AG [10.1007/978-3-319-40578-0_9].
Cingolani, D; Ianni, M; Pellegrini, A; Quaglia, F
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/2108/240468
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