A new distributed frequency multiplier topology is proposed. The phase matching condition accordingly to the order of frequency multiplication is derived. Based on this topology, a frequency doubler for 8–12 GHz output frequencies is designed and analyzed numerically. Due to the circuit topology, the fundamental and third harmonics at the output may be suppressed completely.
Simion, S., Bartolucci, G. (2016). Analysis and design of a new topology for a broadband and low spurious distributed frequency doubler. In Proceedings of the International Semiconductor Conference, CAS (pp.59-62). Bucarest : IEEE [10.1109/SMICND.2016.7783039].
Analysis and design of a new topology for a broadband and low spurious distributed frequency doubler
BARTOLUCCI, GIANCARLO
2016-01-01
Abstract
A new distributed frequency multiplier topology is proposed. The phase matching condition accordingly to the order of frequency multiplication is derived. Based on this topology, a frequency doubler for 8–12 GHz output frequencies is designed and analyzed numerically. Due to the circuit topology, the fundamental and third harmonics at the output may be suppressed completely.File | Dimensione | Formato | |
---|---|---|---|
CAS_2016_doubler.pdf
solo utenti autorizzati
Licenza:
Copyright dell'editore
Dimensione
532.4 kB
Formato
Adobe PDF
|
532.4 kB | Adobe PDF | Visualizza/Apri Richiedi una copia |
I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.