In this contribution, a novel approach, based on single cells permutations, is presented for the minimization of RMS errors in digitally controlled subsystems. The method is described and demonstrated for phase-shifting functionalities, but it can be easily applied to different subsystems. By using the proposed approach, the designer is able to choose the best cell configuration, fulfilling arbitrary specification goals. An X-band GaAs multifunctional chip (MFC) for T/R Module applications, composed by a six-bit phase shifter, six-bit attenuator, T/R switch, and on-board serial-to-parallel converter has been designed, realized, tested, and presented here as a test vehicle of the methodology. Measured results include a 4.5° maximum RMS phase error, 1.2 dB maximum RMS spurious amplitude error, and better than 13 dB input and output return losses for all phase and amplitude settings over the whole 9.0-10.2 GHz operating bandwidth. © 2012 Wiley Periodicals, Inc.

Bentini, A., Ferrari, M., Ciccognani, W., Limiti, E. (2012). A Novel Approach to Minimize RMS Errors in Multi-Functional Chips. INTERNATIONAL JOURNAL OF RF AND MICROWAVE COMPUTER-AIDED ENGINEERING, 22(3), 387-393 [10.1002/mmce.20611].

A Novel Approach to Minimize RMS Errors in Multi-Functional Chips

CICCOGNANI, WALTER;LIMITI, ERNESTO
2012-01-01

Abstract

In this contribution, a novel approach, based on single cells permutations, is presented for the minimization of RMS errors in digitally controlled subsystems. The method is described and demonstrated for phase-shifting functionalities, but it can be easily applied to different subsystems. By using the proposed approach, the designer is able to choose the best cell configuration, fulfilling arbitrary specification goals. An X-band GaAs multifunctional chip (MFC) for T/R Module applications, composed by a six-bit phase shifter, six-bit attenuator, T/R switch, and on-board serial-to-parallel converter has been designed, realized, tested, and presented here as a test vehicle of the methodology. Measured results include a 4.5° maximum RMS phase error, 1.2 dB maximum RMS spurious amplitude error, and better than 13 dB input and output return losses for all phase and amplitude settings over the whole 9.0-10.2 GHz operating bandwidth. © 2012 Wiley Periodicals, Inc.
2012
Pubblicato
Rilevanza internazionale
Articolo
Esperti anonimi
Settore ING-INF/01 - ELETTRONICA
English
Con Impact Factor ISI
core chip; MMIC; monolithic phase shifters; multifunctional chip; RMS errors
Bentini, A., Ferrari, M., Ciccognani, W., Limiti, E. (2012). A Novel Approach to Minimize RMS Errors in Multi-Functional Chips. INTERNATIONAL JOURNAL OF RF AND MICROWAVE COMPUTER-AIDED ENGINEERING, 22(3), 387-393 [10.1002/mmce.20611].
Bentini, A; Ferrari, M; Ciccognani, W; Limiti, E
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/2108/90567
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