This letter presents the design and characterization of a novel wideband Doherty architecture. Both input splitter and output combiner are realized by means of two-sections branch-line alike couplers. The realized prototype based on commercial GaN active devices showsmore than 36% of fractional bandwidth, from 1.67 to 2.41 GHz. In this frequency range, the measured drain efficiency is within 59% and 43% at 6 dB of output power back-off and within 72% and 53% at saturation, with an output power around 41 dBm. More than 47% average efficiency and less than 40 dBc adjacent channel power ratio are measured applying a 20 MHz LTE digitally pre-distorted signal when the average output power is around 4 W.
Piazzon, L., Giofre', R., Colantonio, P., Giannini, F. (2013). A Wideband Doherty Architecture With 36% of Fractional Bandwidth. IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, 23(11), 626-628 [10.1109/LMWC.2013.2281413].
A Wideband Doherty Architecture With 36% of Fractional Bandwidth
PIAZZON, LUCA;GIOFRE', ROCCO;COLANTONIO, PAOLO;GIANNINI, FRANCO
2013-11-01
Abstract
This letter presents the design and characterization of a novel wideband Doherty architecture. Both input splitter and output combiner are realized by means of two-sections branch-line alike couplers. The realized prototype based on commercial GaN active devices showsmore than 36% of fractional bandwidth, from 1.67 to 2.41 GHz. In this frequency range, the measured drain efficiency is within 59% and 43% at 6 dB of output power back-off and within 72% and 53% at saturation, with an output power around 41 dBm. More than 47% average efficiency and less than 40 dBc adjacent channel power ratio are measured applying a 20 MHz LTE digitally pre-distorted signal when the average output power is around 4 W.File | Dimensione | Formato | |
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