As traditional space-grade computing systems struggle to meet the increasing computational demands of modern space missions, RISC-V emerges as a promising alternative due to its open-source and highly customizable nature. However, the extensive hardware customization options in RISC-V introduce complexity in validation, making it challenging to ensure system reliability. This paper introduces a robust methodology for validating RISC-V-based systems under accelerated radiation beams, focusing on test uptime, leveraging Commercial Off-The-Shelf (COTS) FPGA devices, which offer flexibility and cost-effectiveness, to enable concurrent hardware and software development. We demonstrate how our methodology offers a comprehensive approach for testing heterogeneous systems on FPGAs, balancing thorough integration with cost-efficiency and test robustness. During our experiments with accelerated neutrons to assess the resilience of RISC-V cores, our approach guaranteed the correct delivery of 100% of the packages, while minimizing system downtime during radiation testing by reducing the Test Fixture SEFI cross-section.
Forlin, B., Bohmer, K., Cazzaniga, C., Rech, P., Furano, G., Alachiotis, N., et al. (2025). From ground to orbit: a robust and efficient test methodology for RISC-V soft-cores. IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY, 25(1), 27-36 [10.1109/TDMR.2025.3537718].
From ground to orbit: a robust and efficient test methodology for RISC-V soft-cores
Ottavi, Marco
2025-01-01
Abstract
As traditional space-grade computing systems struggle to meet the increasing computational demands of modern space missions, RISC-V emerges as a promising alternative due to its open-source and highly customizable nature. However, the extensive hardware customization options in RISC-V introduce complexity in validation, making it challenging to ensure system reliability. This paper introduces a robust methodology for validating RISC-V-based systems under accelerated radiation beams, focusing on test uptime, leveraging Commercial Off-The-Shelf (COTS) FPGA devices, which offer flexibility and cost-effectiveness, to enable concurrent hardware and software development. We demonstrate how our methodology offers a comprehensive approach for testing heterogeneous systems on FPGAs, balancing thorough integration with cost-efficiency and test robustness. During our experiments with accelerated neutrons to assess the resilience of RISC-V cores, our approach guaranteed the correct delivery of 100% of the packages, while minimizing system downtime during radiation testing by reducing the Test Fixture SEFI cross-section.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.


