The successful development of cellular neural networks is dependent on hardware implementation. This letter presents a VLSI implementation of a multichip-oriented, fully programmable, 3×3 digitally programmable cellular neural network (DPCNN). This chip covers most of the available one-neighborhood templates for image processing applications. Moreover, it can be easily interconnected to others to carry out very large CNN arrays.

Sargeni, F., & Bonaiuto, V. (1995). A Fully digitally programmable CNN chip. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. 2, ANALOG AND DIGITAL SIGNAL PROCESSING, 42(11), 741-745 [10.1109/82.475256].

A Fully digitally programmable CNN chip

SARGENI, FAUSTO;BONAIUTO, VINCENZO
1995

Abstract

The successful development of cellular neural networks is dependent on hardware implementation. This letter presents a VLSI implementation of a multichip-oriented, fully programmable, 3×3 digitally programmable cellular neural network (DPCNN). This chip covers most of the available one-neighborhood templates for image processing applications. Moreover, it can be easily interconnected to others to carry out very large CNN arrays.
Pubblicato
Rilevanza internazionale
Articolo
Sì, ma tipo non specificato
Settore ING-IND/31 - Elettrotecnica
English
Cellular arrays; image processing; microprocessor chips; VLSI circuits; digitally programmable cellular neural network chip; cellular neural networks
Sargeni, F., & Bonaiuto, V. (1995). A Fully digitally programmable CNN chip. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. 2, ANALOG AND DIGITAL SIGNAL PROCESSING, 42(11), 741-745 [10.1109/82.475256].
Sargeni, F; Bonaiuto, V
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Utilizza questo identificativo per citare o creare un link a questo documento: http://hdl.handle.net/2108/42044
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