The ATLAS Level-1 Muon Barrel Trigger is one of the main elements of the first stage of event selection of the ATLAS experiment at the Large Hadron Collider. The challenge of the Level-1 system is a reduction of the event rate from a collision rate of 40 MHz by a factor 103, using simple algorithms that can be executed in highly parallel custom electronics with a latency of the order of 1 mu s. The input stage of the Level-1 Muon consists of an array of processors receiving the full granularity of data from a dedicated detector (Resistive Plate Chambers in the Barrel). This first stage of the algorithm is performed directly on-detector, while the final stage is performed in boards mounted in the counting room, by the so-called off-detector electronics. The trigger algorithm is executed within a fixed latency, its real-time output is the multiplicity of muon candidates passing a set of programmable p(T) thresholds, and their topological information. The detector system and the trigger electronics are designed to achieve a safe bunch-crossing identification. In order to optimize design effort and cost, the trigger system integrates also the readout of the detector, with its own requirements on time resolution and overall data bandwidth. We present the detailed functional requirements of the Level-1 Muon Barrel system, its architecture, implementation and construction.
Anulli, F., Ciapetti, G., De Pedis, D., Di Girolamo, A., Luci, C., Nisati, A., et al. (2009). The Level-1 Trigger Muon Barrel System of the ATLAS experiment at CERN. JOURNAL OF INSTRUMENTATION, 4 [10.1088/1748-0221/4/04/P04010].
The Level-1 Trigger Muon Barrel System of the ATLAS experiment at CERN
AIELLI, GIULIO;CAMARRI, PAOLO;DI CIACCIO, ANNA;SANTONICO, RINALDO;
2009-01-01
Abstract
The ATLAS Level-1 Muon Barrel Trigger is one of the main elements of the first stage of event selection of the ATLAS experiment at the Large Hadron Collider. The challenge of the Level-1 system is a reduction of the event rate from a collision rate of 40 MHz by a factor 103, using simple algorithms that can be executed in highly parallel custom electronics with a latency of the order of 1 mu s. The input stage of the Level-1 Muon consists of an array of processors receiving the full granularity of data from a dedicated detector (Resistive Plate Chambers in the Barrel). This first stage of the algorithm is performed directly on-detector, while the final stage is performed in boards mounted in the counting room, by the so-called off-detector electronics. The trigger algorithm is executed within a fixed latency, its real-time output is the multiplicity of muon candidates passing a set of programmable p(T) thresholds, and their topological information. The detector system and the trigger electronics are designed to achieve a safe bunch-crossing identification. In order to optimize design effort and cost, the trigger system integrates also the readout of the detector, with its own requirements on time resolution and overall data bandwidth. We present the detailed functional requirements of the Level-1 Muon Barrel system, its architecture, implementation and construction.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.