In recent works we presented the results of the characterization and the study of performance of several Silicon Photomultipliers delivered from MEPHI (Moscow Engineering and Physics Institute) and we proposed an electrical model of the SiPM to be used in analog simulations for the VLSI design of the pilot chip with 0:35 mm technology produced. The results of the simulations was also presented. In this work we present the results of several test performed on the SiPM connected to the pilot chip. We also describe the prototype board with a micro-controller designed to adjust the parameters of the chip and to provide an adjustable and temperature controlled power supply to the SiPM. The results of the tests obtained allow us to refine the circuits design for the next chip. This chip has been developed inside the ALTCRISS and KLOE collaboration
Badoni, D., Gonnella, F., Messi, R., Moricciani, D., Archilli, F., Iafolla, L. (2010). A CMOS front-end for SiPM devices aimed to TOF applications with adjustable threshold and high dynamical range. NUCLEAR INSTRUMENTS & METHODS IN PHYSICS RESEARCH. SECTION A, ACCELERATORS, SPECTROMETERS, DETECTORS AND ASSOCIATED EQUIPMENT, 617(1-3), 310-312 [10.1016/j.nima.2009.09.034].
A CMOS front-end for SiPM devices aimed to TOF applications with adjustable threshold and high dynamical range
Messi, R.;Archilli, F.;
2010-05-01
Abstract
In recent works we presented the results of the characterization and the study of performance of several Silicon Photomultipliers delivered from MEPHI (Moscow Engineering and Physics Institute) and we proposed an electrical model of the SiPM to be used in analog simulations for the VLSI design of the pilot chip with 0:35 mm technology produced. The results of the simulations was also presented. In this work we present the results of several test performed on the SiPM connected to the pilot chip. We also describe the prototype board with a micro-controller designed to adjust the parameters of the chip and to provide an adjustable and temperature controlled power supply to the SiPM. The results of the tests obtained allow us to refine the circuits design for the next chip. This chip has been developed inside the ALTCRISS and KLOE collaborationI documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.