In state-of-the-art Software Transactional Memory (STM) systems, threads carry out the execution of transactions as non-interruptible tasks. Hence, a thread can react to the injection of a higher priority transactional task and take care of its processing only at the end of the currently executed transaction. In this article we pursue a paradigm shift where the execution of an in-memory transaction is carried out as a preemptable task, so that a thread can start processing a higher priority transactional task before finalizing its current transaction. We achieve this goal in an application-transparent manner, by only relying on Operating System facilities we include in our preemptive STM architecture. With our approach we are able to re-evaluate CPU assignment across transactions along a same thread every few tens of microseconds. This is mandatory for an effective priority-aware architecture given the typically finer-grain nature of in-memory transactions compared to their counterpart in database systems. We integrated our preemptive STM architecture with the TinySTM package, and released it as open source. We also provide the results of an experimental assessment of our proposal based on running a port of the TPC-C benchmark to the STM environment.

Silvestri, E., Economo, S., Di Sanzo, P., Pellegrini, A., Quaglia, F. (2017). Preemptive software transactional memory. In 17th IEEE/ACM International Symposium on Cluster, Cloud and Grid Computing (CCGRID) (pp.294-303). NEW YORK : IEEE [10.1109/CCGRID.2017.98].

Preemptive software transactional memory

Alessandro Pellegrini;Francesco Quaglia
2017-05-01

Abstract

In state-of-the-art Software Transactional Memory (STM) systems, threads carry out the execution of transactions as non-interruptible tasks. Hence, a thread can react to the injection of a higher priority transactional task and take care of its processing only at the end of the currently executed transaction. In this article we pursue a paradigm shift where the execution of an in-memory transaction is carried out as a preemptable task, so that a thread can start processing a higher priority transactional task before finalizing its current transaction. We achieve this goal in an application-transparent manner, by only relying on Operating System facilities we include in our preemptive STM architecture. With our approach we are able to re-evaluate CPU assignment across transactions along a same thread every few tens of microseconds. This is mandatory for an effective priority-aware architecture given the typically finer-grain nature of in-memory transactions compared to their counterpart in database systems. We integrated our preemptive STM architecture with the TinySTM package, and released it as open source. We also provide the results of an experimental assessment of our proposal based on running a port of the TPC-C benchmark to the STM environment.
17th IEEE/ACM International Symposium on Cluster, Cloud and Grid Computing
Rilevanza internazionale
mag-2017
Settore ING-INF/05 - SISTEMI DI ELABORAZIONE DELLE INFORMAZIONI
English
Intervento a convegno
Silvestri, E., Economo, S., Di Sanzo, P., Pellegrini, A., Quaglia, F. (2017). Preemptive software transactional memory. In 17th IEEE/ACM International Symposium on Cluster, Cloud and Grid Computing (CCGRID) (pp.294-303). NEW YORK : IEEE [10.1109/CCGRID.2017.98].
Silvestri, E; Economo, S; Di Sanzo, P; Pellegrini, A; Quaglia, F
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/2108/200444
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