Sfoglia per Autore
A RISC-V Hardware Accelerator for Q-Learning Algorithm
2024-01-01 Angeloni, D; Canese, L; Cardarilli, Gc; Di Nunzio, L; Re, M; Spano, S
Phased Arrays and BeamForming for MIMO and GNSS Applications
2024-01-01 Acciarito, S; Canese, L; Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Cesa, Rl; Re, M; Spano, S
Resilient multi-agent RL: introducing DQ-RTS for distributed environments with data loss
2024-01-01 Canese, L; Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Re, M; Spano, S
Design Space Exploration for Edge machine learning featured by MathWorks FPGA DL Processor: a survey
2024-01-01 Bertazzoni, S; Canese, L; Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Re, M; Spano, S
Tunable Floating Point for high quality audio systems: the sound of numbers
2023-01-01 Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Cesa, Rl; Nannarelli, A; Re, M
A Hardware-Oriented QAM Demodulation Method Driven by AW-SOM Machine Learning
2023-01-01 Canese, L; Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Re, M; Spano, S
An RNS-based initial absolute position estimator for electrical encoders
2023-01-01 Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Giardino, D; Re, M; Nannarelli, A; Spano, S
Efficient Digital Implementation of a Multirate-based Variable Fractional Delay Filter for Wideband Beamforming
2023-01-01 Canese, L; Cardarilli, Gc; Nunzio, Ld; Fazzolari, R; Giardino, D; Re, M; Spano, S
FPGA-Based Road Crack Detection Using Deep Learning
2023-01-01 Canese, L; Cardarilli, G; Di Nunzio, L; Fazzolari, R; Re, M; Spano, S
Sensing and Detection of Traffic Signs Using CNNs: An Assessment on Their Performance
2022-11-15 Canese, L; Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Famil Ghadakchi, H; Re, M; Spanò, S
A M-PSK Timing Recovery Loop Based on Q-Learning
2022-01-01 Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Giardino, D; Guadagno, M; Re, M; Spano, S
Design space exploration based methodology for residue number system digital filters implementation
2022-01-01 Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Nannarelli, A; Petricca, M; Re, M
An FPGA-based multi-agent reinforcement learning timing synchronizer
2022-01-01 Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Giardino, D; Re, M; Ricci, A; Spano, S
An Action-selection policy generator for reinforcement learning hardware accelerators
2021-01-01 Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Giardino, D; Matta, M; Re, M; Spano, S
FPGA implementation of a QRD-RLS-based equalizer for MIMO systems
2021-01-01 Canese, L; Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Fiorentino, L; Giardino, D; Re, M; Spano, S
Design and FPGA Implementation of a Low Power OFDM Transmitter for Narrow-Band IoT
2021-01-01 Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Cesa, Rl; Re, M
A pseudo-softmax function for hardware-based high speed image classification
2021-01-01 Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Giardino, D; Nannarelli, A; Re, M; Spano, S
“MR Q-Learning” Algorithm for Efficient Hardware Implementations
2021-01-01 Carlo Cardarilli, G; Di Nunzio, L; Fazzolari, R; Giardino, D; Natale, D; Re, M; Spano, S
M-PSK demodulator with joint carrier and timing recovery
2021-01-01 Giardino, D; Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Nannarelli, A; Re, M; Spano, S
Author correction: A pseudo-softmax function for hardware-based high speed image classification
2021-01-01 Cardarilli, G; Di Nunzio, L; Fazzolari, R; Giardino, D; Nannarelli, A; Re, M; Spano, S
Multi-agent reinforcement learning: a review of challenges and applications
2021-01-01 Canese, L; Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Giardino, D; Re, M; Spano, S
A Parallel hardware implementation for 2D hierarchical clustering based on fuzzy logic
2021-01-01 Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Panella, M; Re, M; Rosato, A; Spano, S
Acoustic Emissions Detection and Ranging of Cracks in Metal Tanks Using Deep Learning
2020-01-01 Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Giardino, D; Matta, M; Re, M; Spano, S
N-dimensional approximation of Euclidean distance
2020-01-01 Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Nannarelli, A; Re, M; Spano, S
Memristive and memory impedance behavior in a photo-annealed ZnO–rGO thin-film device
2020-01-01 Cardarilli, Gc; Khanal, Gm; Di Nunzio, L; Re, M; Fazzolari, R; Kumar, R
FPGA implementation of Q-RTS for real-time Swarm intelligence systems
2020-01-01 Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Giardino, D; Matta, M; Nannarelli, A; Re, M; Spano, S
AW-SOM, an algorithm for high-speed learning in hardware self-organizing maps
2020-01-01 Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Re, M; Spano, S
Indoor localization system based on bluetooth low energy for museum applications
2020-01-01 Giuliano, R; Cardarilli, Gc; Cesarini, C; Di Nunzio, L; Fallucchi, F; Fazzolari, R; Mazzenga, F; Re, M; Vizzarri, A
Digital signal processing accelerator for RISC-V
2019-01-01 Calicchia, L; Ciotoli, V; Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Nannarelli, A; Re, M
IP generator tool for efficient hardware acceleration of self-organizing maps
2019-01-01 Giardino, D; Matta, M; Re, M; Silvestri, F; Spanò, S
Comparison and implementation of variable fractional delay filters for wideband digital beamforming
2019-01-01 Cardarilli, Gc; Giardino, D; Matta, M; Re, M; Silvestri, F; Simone, L; Spano, S
Approximated computing for low power neural networks
2019-01-01 Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Giardino, D; Matta, M; Patetta, M; Re, M; Spano, S
Digital architecture of next generation spacecraft tracker based on wideband ∆DOR
2019-01-01 Acciarito, S; Cardarilli, Gc; Khanal, Gm; Matta, M; Re, M; Silvestri, F; Spano, S; Gelfusa, D; Simone, L
FPGA implementation of a low-power QRS extractor
2019-01-01 Silvestri, F; Acciarito, S; Cardarilli, Gc; Khanal, Gm; Di Nunzio, L; Fazzolari, R; Re, M
Efficient ensemble machine learning implementation on FPGA using partial reconfiguration
2019-01-01 Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Giardino, D; Matta, M; Re, M; Silvestri, F; Spano, S
Merged carrier and timing recovery loops QPSK demodulator based on iterative learning control
2019-01-01 Cardarilli, Gc; Giardino, D; Di Nunzio, L; Fazzolari, R; Matta, M; Re, M; Silvestri, F; Spano, S
Hardware prototyping and validation of a W-ΔDOR digital signal processor
2019-01-01 Cardarilli, G; Di Nunzio, L; Fazzolari, R; Giardino, D; Matta, M; Re, M; Iess, L; Cialfi, F; De Angelis, G; Gelfusa, D; Pulcinelli, Ap; Simone, L
FPGA implementation of a channelizer with 2048 channels utilizing USRP-SDR platform for satellite communications
2019-01-01 Acciarito, S; Giardino, D; Khanal, Gm; Re, M; Silvestri, F; Spanò, S
Efficient FPGA implementation of high speed digital delay for wideband beamforming using parallel architectures
2019-01-01 Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Giardino, D; Matta, M; Re, M; Spano, S; Simone, L
An efficient hardware implementation of reinforcement learning: The q-learning algorithm
2019-01-01 Spanò, S; Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Giardino, D; Matta, M; Nannarelli, A; Re, M
Q-RTS: A real-time swarm intelligence based on multi-agent Q-learning
2019-01-01 Matta, M; Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Giardino, D; Re, M; Silvestri, F; Spano, S
Approximated Canonical Signed Digit for Error Resilient Intelligent Computation
2019-01-01 Cardarilli, Gc; DI Nunzio, L; Fazzolari, R; Nannarelli, A; Re, M
Improvement of the cardiac oscillator based model for the simulation of bundle branch blocks
2019-01-01 Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Re, M; Silvestri, F
A reinforcement learning-based QAM/PSK symbol synchronizer
2019-01-01 Matta, M; Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Giardino, D; Nannarelli, A; Re, M; Spano, S
A Q-learning based PSK symbol synchronizer
2019-01-01 Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Giardino, D; Matta, M; Re, M; Silvestri, F; Spano, S
Comparison of low-complexity algorithms for real-time QRS detection using standard ECG database
2018-01-01 Francesca, S; Cardarilli Gian, C; Di Nunzio, L; Fazzolari, R; Re, M
Comparison between trigonometric and traditional DDS, in 90 nm technology
2018-01-01 Cardarilli, Gc; Di Nunzio, L; Giardino, D; Matta, M; Nannarelli, A; Re, M; Silvestri, F; Spanò, S
A Power Efficient Digital Front-End for Cognitive Radio Systems
2018-01-01 Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Nannarelli, A; Re, M
ZnO-rGO composite thin film resistive switching device: emulating biological synapse behavior
2018-01-01 Khanal, G; Acciarito, S; Cardarilli, Gc; Chakraborty, A; DI NUNZIO, L; Fazzolari, R; Cristini, A; Susi, G; Re, M
Compressive sensing reconstruction for complex system: A hardware/software approach
2018-01-01 Acciarito, S; Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Khanal, Gm; Re, M
Analog chain calibration in Digital Beam-Forming applications
2018-01-01 Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Re, M; Rufolo, G; Bernocchi, G
Energy consumption saving in embedded microprocessors using hardware accelerators
2018-01-01 Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Re, M; Silvestri, F; Spano, S
Setup and experimental results analysis of COTS Camera and SRAMs at the ISIS neutron facility
2018-01-01 Ottavi, M; Asciolla, D; Fiorucci, T; Grosso, E; Marzullo, C; Scaramella, A; Stramaccioni, S; Zibecchi, A; Andreani, C; Cardarilli, Gc; Cazzaniga, C; Di Nunzio, L; Fazzolari, R; Re, M; Reviriego, P; Furano, G; Senesi, R
Digital Architecture and ASIC Implementation of Wideband Delta DOR Spacecraft Onboard Tracker
2018-01-01 Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Gelfusa, D; Matta, M; Nannarelli, A; Re, M; Simone, L; Spano, S
RNS applications in digital signal processing
2017-01-01 Cardarilli, Gc; Nannarelli, A; Re, M
Comparison of jamming excision methods for direct sequence/spread spectrum (DS/SS) modulated signal
2017-01-01 Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Fereidountabar, A; Giuliani, F; Re, M; Simone, L
Synaptic behaviour in ZnO-rGO composites thin film memristor
2017-01-01 Khanal, G; Acciarito, S; Cardarilli, G; Chakraborty, A; Di Nunzio, L; Fazzolari, R; Cristini, A; Re, M; Susi, G
A new electric encoder position estimator based on the Chinese Remainder Theorem for the CMG performance improvements
2017-01-01 Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Gerardi, L; Re, M; Campolo, G; Cascone, D
A wireless sensor node based on microbial fuel cell
2017-01-01 Acciarito, S; Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Re, M
Hardware design of LIF with Latency neuron model with memristive STDP synapses
2017-01-01 Acciarito, S; Cardarilli, Gc; Cristini, A; DI NUNZIO, L; Fazzolari, R; Khanal, G; Re, M; Susi, G
Robust throughput boosting for low latency dynamic partial reconfiguration
2017-01-01 Nannarelli, A; Re, M; Cardarilli, Gc; Di Nunzio, L; Brunella, Ms; Fazzolari, R; Carbonari, F
Flexible channel extractor for wideband systems based on polyphase filter bank
2017-01-01 Cappello, S; Cardarilli, Gc; di Nunzio, L; Fazzolari, R; Re, M; Albicocco, P
A hardware framework for on-chip FPGA acceleration
2016-01-01 Lomuscio, A; Cardarilli, Gc; Nannarelli, A; Re, M
Dynamically-loaded Hardware Libraries (HLL) technology for audio applications
2016-01-01 Esposito, A; Lomuscio, A; Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Nannarelli, A; Re, M
Fully digital intensity modulated LIDAR
2016-01-01 Pollastrone, F; Cardarilli, Gc; Pizzoferrato, R; Re, M
A ZnO-rGO composite thin film discrete memristor
2016-01-01 Khanal, Gm; Cardarilli, G; Chakraborty, A; Acciarito, S; Mulla, My; Di Nunzio, L; Fazzolari, R; Re, M
Design and characterization of a high-safety hardware/software module for the acquisition of Eurobalise telegrams
2016-01-01 Giuliani, F; Ottavi, M; Cardarilli, Gc; Re, M; DI NUNZIO, L; Fazzolari, R; Bruno, A; Zuliani, F
Characterization of RNS multiply-add units for power efficient DSP
2015-01-01 Cardarilli, Gc; Nannarelli, A; Petricca, M; Re, M
A framework for dynamically-loaded hardware library (HLL) in FPGA acceleration
2015-01-01 Cardarilli, Gc; Di Carlo, L; Nannarelli, A; Pandolfi, Fm; Re, M
High performance bit-stream decompressor for partial reconfigurable FPGAs
2014-06-01 Cardarilli, Gc; Re, M; Shuli, I
A reconfigurable functional unit for modular operations
2014-06-01 Cardarilli, Gc; DI NUNZIO, L; Fazzolari, R; Pontarelli, S; Re, M
Event-driven simulation of continuous-time neural networks
2014-01-01 Salerno, M; Susi, G; Cristini, A; Re, M; Cardarilli, Gc
TDES cryptography algorithm acceleration using a reconfigurable functional unit
2014-01-01 Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Re, M
Twenty years of research on RNS for DSP: Lessons learned and future perspectives
2014-01-01 Albicocco, P; Cardarilli, Gc; Nannarelli, A; Re, M
Compressive sensing spectrum analysis for space autonomous radio receivers
2013-11-01 Cardarilli, Gc; Re, M; Shuli, I; Simone, L
Spiking neural networks based on LIF with latency: Simulation and synchronization effects
2013-11-01 Cardarilli, Gc; Cristini, A; DI NUNZIO, L; Re, M; Salerno, M; Susi, G
Truncated multipliers through power-gating for degrading precision arithmetic
2013-11-01 Albicocco, P; Cardarilli, Gc; Nannarelli, A; Petricca, M; Re, M
Continuous-time spiking neural networks: general paradigm and event-driven simulation
2013-06-01 Salerno, M; Susi, G; Cristini, A; Re, M; Cardarilli, Gc
AudiNect: an aid for the autonomous navigation of visually impaired people, based on virtual interface
2013-01-01 Salerno, M; Re, M; Cristini, A; Susi, G; Bertola, M; Daddario, E; Capobianco, F
Integration of butterfly and inverse butterfly nets in embedded processors: Effects on power saving
2012-01-01 Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Re, M; Lee, R
Imprecise arithmetic for low power image processing
2012-01-01 Albicocco, P; Cardarilli, Gc; Nannarelli, A; Petricca, M; Re, M
Karatsuba implementation of FIR filters
2012-01-01 Albicocco, P; Cardarilli, Gc; Pontarelli, S; Re, M
Optimized implementation of RNS FIR filters based on FPGAs
2012-01-01 Pontarelli, S; Cardarilli, Gc; Re, M; Salsano, A
Power efficient design of parallel/serial FIR filters in RNS
2012-01-01 Petricca, M; Albicocco, P; Cardarilli, Gc; Nannarelli, A; Re, M
Degrading precision arithmetics for low-power FIR implementation
2011-01-01 Albicocco, P; Cardarilli, Gc; Nannarelli, A; Petricca, M; Re, M
FPGA implementation of a low-area/high-SFDR DDFS architecture
2011-01-01 Cardarilli, Gc; D'Alessio, M; Di Nunzio, L; Fazzolari, R; Murgia, D; Re, M
Fine-grain reconfigurable functional unit for embedded processors
2011-01-01 Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Re, M
Partial reconfiguration in the implementation of autonomous radio receivers for space
2011-01-01 Cardarilli, Gc; Re, M; Shuli, I; Simone, L
Implementation of the AES algorithm using a reconfigurable functional unit
2011-01-01 Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Pontarelli, S; Re, M; Salsano, A
Butterfly and inverse butterfly nets integration on Altera NIOS-II embedded processor
2010-01-01 Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Re, M; Lee, R
Degrading precision arithmetic for low power signal processing
2010-01-01 Petricca, M; Cardarilli, Gc; Nannarelli, A; Re, M; Albicocco, P
Design of large polyphase filters in the quadratic residue number system
2010-01-01 Cardarilli, Gc; Nannarelli, A; Oster, Y; Petricca, M; Re, M
On the comparison of different number systems in the implementation of complex FIR filters
2010-01-01 Cardarilli, Gc; Nannarelli, A; Re, M
VLSI implementation of reconfigurable cells for RFU in embedded processors
2010-01-01 Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Lenci, C; Re, M
Algorithm acceleration on LEON-2 processor using a reconfigurable bit manipulation unit
2010-01-01 Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Re, M
Hardware implementation of MPEG analysis and deblocking for video enhancement
2009-01-01 Petricca, M; Li, H; Forchhammer, S; Nannarelli, A; Re, M; Andersen, J; Cardarilli, Gc
Improved large-signal model for vacuum triodes
2009-01-01 Cardarilli, Gc; Re, M; Di Carlo, L
Speed-up of RISC processor computation using ADAPTO
2009-01-01 Cardarilli, Gc; Di Nunzio, L; Re, M
Multiple constant multiplication through residue number system
2009-01-01 Shuli, I; Petricca, M; Cardarilli, Gc; Nannarelli, A; Re, M
Error correction codes for SEU and SEFI tolerant memory systems
2009-01-01 Pontarelli, S; Cardarilli, Gc; Re, M; Salsano, A
Data di pubblicazione | Titolo | Autore(i) | Tipo | File |
---|---|---|---|---|
1-gen-2024 | A RISC-V Hardware Accelerator for Q-Learning Algorithm | Angeloni, D; Canese, L; Cardarilli, Gc; Di Nunzio, L; Re, M; Spano, S | Intervento a convegno | |
1-gen-2024 | Phased Arrays and BeamForming for MIMO and GNSS Applications | Acciarito, S; Canese, L; Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Cesa, Rl; Re, M; Spano, S | Intervento a convegno | |
1-gen-2024 | Resilient multi-agent RL: introducing DQ-RTS for distributed environments with data loss | Canese, L; Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Re, M; Spano, S | Articolo su rivista | |
1-gen-2024 | Design Space Exploration for Edge machine learning featured by MathWorks FPGA DL Processor: a survey | Bertazzoni, S; Canese, L; Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Re, M; Spano, S | Articolo su rivista | |
1-gen-2023 | Tunable Floating Point for high quality audio systems: the sound of numbers | Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Cesa, Rl; Nannarelli, A; Re, M | Intervento a convegno | |
1-gen-2023 | A Hardware-Oriented QAM Demodulation Method Driven by AW-SOM Machine Learning | Canese, L; Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Re, M; Spano, S | Intervento a convegno | |
1-gen-2023 | An RNS-based initial absolute position estimator for electrical encoders | Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Giardino, D; Re, M; Nannarelli, A; Spano, S | Articolo su rivista | |
1-gen-2023 | Efficient Digital Implementation of a Multirate-based Variable Fractional Delay Filter for Wideband Beamforming | Canese, L; Cardarilli, Gc; Nunzio, Ld; Fazzolari, R; Giardino, D; Re, M; Spano, S | Articolo su rivista | |
1-gen-2023 | FPGA-Based Road Crack Detection Using Deep Learning | Canese, L; Cardarilli, G; Di Nunzio, L; Fazzolari, R; Re, M; Spano, S | Intervento a convegno | |
15-nov-2022 | Sensing and Detection of Traffic Signs Using CNNs: An Assessment on Their Performance | Canese, L; Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Famil Ghadakchi, H; Re, M; Spanò, S | Articolo su rivista | |
1-gen-2022 | A M-PSK Timing Recovery Loop Based on Q-Learning | Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Giardino, D; Guadagno, M; Re, M; Spano, S | Intervento a convegno | |
1-gen-2022 | Design space exploration based methodology for residue number system digital filters implementation | Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Nannarelli, A; Petricca, M; Re, M | Articolo su rivista | |
1-gen-2022 | An FPGA-based multi-agent reinforcement learning timing synchronizer | Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Giardino, D; Re, M; Ricci, A; Spano, S | Articolo su rivista | |
1-gen-2021 | An Action-selection policy generator for reinforcement learning hardware accelerators | Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Giardino, D; Matta, M; Re, M; Spano, S | Intervento a convegno | |
1-gen-2021 | FPGA implementation of a QRD-RLS-based equalizer for MIMO systems | Canese, L; Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Fiorentino, L; Giardino, D; Re, M; Spano, S | Intervento a convegno | |
1-gen-2021 | Design and FPGA Implementation of a Low Power OFDM Transmitter for Narrow-Band IoT | Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Cesa, Rl; Re, M | Intervento a convegno | |
1-gen-2021 | A pseudo-softmax function for hardware-based high speed image classification | Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Giardino, D; Nannarelli, A; Re, M; Spano, S | Articolo su rivista | |
1-gen-2021 | “MR Q-Learning” Algorithm for Efficient Hardware Implementations | Carlo Cardarilli, G; Di Nunzio, L; Fazzolari, R; Giardino, D; Natale, D; Re, M; Spano, S | Intervento a convegno | |
1-gen-2021 | M-PSK demodulator with joint carrier and timing recovery | Giardino, D; Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Nannarelli, A; Re, M; Spano, S | Articolo su rivista | |
1-gen-2021 | Author correction: A pseudo-softmax function for hardware-based high speed image classification | Cardarilli, G; Di Nunzio, L; Fazzolari, R; Giardino, D; Nannarelli, A; Re, M; Spano, S | Articolo su rivista | |
1-gen-2021 | Multi-agent reinforcement learning: a review of challenges and applications | Canese, L; Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Giardino, D; Re, M; Spano, S | Articolo su rivista | |
1-gen-2021 | A Parallel hardware implementation for 2D hierarchical clustering based on fuzzy logic | Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Panella, M; Re, M; Rosato, A; Spano, S | Articolo su rivista | |
1-gen-2020 | Acoustic Emissions Detection and Ranging of Cracks in Metal Tanks Using Deep Learning | Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Giardino, D; Matta, M; Re, M; Spano, S | Intervento a convegno | |
1-gen-2020 | N-dimensional approximation of Euclidean distance | Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Nannarelli, A; Re, M; Spano, S | Articolo su rivista | |
1-gen-2020 | Memristive and memory impedance behavior in a photo-annealed ZnO–rGO thin-film device | Cardarilli, Gc; Khanal, Gm; Di Nunzio, L; Re, M; Fazzolari, R; Kumar, R | Articolo su rivista | |
1-gen-2020 | FPGA implementation of Q-RTS for real-time Swarm intelligence systems | Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Giardino, D; Matta, M; Nannarelli, A; Re, M; Spano, S | Intervento a convegno | |
1-gen-2020 | AW-SOM, an algorithm for high-speed learning in hardware self-organizing maps | Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Re, M; Spano, S | Articolo su rivista | |
1-gen-2020 | Indoor localization system based on bluetooth low energy for museum applications | Giuliano, R; Cardarilli, Gc; Cesarini, C; Di Nunzio, L; Fallucchi, F; Fazzolari, R; Mazzenga, F; Re, M; Vizzarri, A | Articolo su rivista | |
1-gen-2019 | Digital signal processing accelerator for RISC-V | Calicchia, L; Ciotoli, V; Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Nannarelli, A; Re, M | Intervento a convegno | |
1-gen-2019 | IP generator tool for efficient hardware acceleration of self-organizing maps | Giardino, D; Matta, M; Re, M; Silvestri, F; Spanò, S | Intervento a convegno | |
1-gen-2019 | Comparison and implementation of variable fractional delay filters for wideband digital beamforming | Cardarilli, Gc; Giardino, D; Matta, M; Re, M; Silvestri, F; Simone, L; Spano, S | Intervento a convegno | |
1-gen-2019 | Approximated computing for low power neural networks | Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Giardino, D; Matta, M; Patetta, M; Re, M; Spano, S | Articolo su rivista | |
1-gen-2019 | Digital architecture of next generation spacecraft tracker based on wideband ∆DOR | Acciarito, S; Cardarilli, Gc; Khanal, Gm; Matta, M; Re, M; Silvestri, F; Spano, S; Gelfusa, D; Simone, L | Intervento a convegno | |
1-gen-2019 | FPGA implementation of a low-power QRS extractor | Silvestri, F; Acciarito, S; Cardarilli, Gc; Khanal, Gm; Di Nunzio, L; Fazzolari, R; Re, M | Intervento a convegno | |
1-gen-2019 | Efficient ensemble machine learning implementation on FPGA using partial reconfiguration | Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Giardino, D; Matta, M; Re, M; Silvestri, F; Spano, S | Intervento a convegno | |
1-gen-2019 | Merged carrier and timing recovery loops QPSK demodulator based on iterative learning control | Cardarilli, Gc; Giardino, D; Di Nunzio, L; Fazzolari, R; Matta, M; Re, M; Silvestri, F; Spano, S | Intervento a convegno | |
1-gen-2019 | Hardware prototyping and validation of a W-ΔDOR digital signal processor | Cardarilli, G; Di Nunzio, L; Fazzolari, R; Giardino, D; Matta, M; Re, M; Iess, L; Cialfi, F; De Angelis, G; Gelfusa, D; Pulcinelli, Ap; Simone, L | Articolo su rivista | |
1-gen-2019 | FPGA implementation of a channelizer with 2048 channels utilizing USRP-SDR platform for satellite communications | Acciarito, S; Giardino, D; Khanal, Gm; Re, M; Silvestri, F; Spanò, S | Intervento a convegno | |
1-gen-2019 | Efficient FPGA implementation of high speed digital delay for wideband beamforming using parallel architectures | Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Giardino, D; Matta, M; Re, M; Spano, S; Simone, L | Articolo su rivista | |
1-gen-2019 | An efficient hardware implementation of reinforcement learning: The q-learning algorithm | Spanò, S; Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Giardino, D; Matta, M; Nannarelli, A; Re, M | Articolo su rivista | |
1-gen-2019 | Q-RTS: A real-time swarm intelligence based on multi-agent Q-learning | Matta, M; Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Giardino, D; Re, M; Silvestri, F; Spano, S | Articolo su rivista | |
1-gen-2019 | Approximated Canonical Signed Digit for Error Resilient Intelligent Computation | Cardarilli, Gc; DI Nunzio, L; Fazzolari, R; Nannarelli, A; Re, M | Intervento a convegno | |
1-gen-2019 | Improvement of the cardiac oscillator based model for the simulation of bundle branch blocks | Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Re, M; Silvestri, F | Articolo su rivista | |
1-gen-2019 | A reinforcement learning-based QAM/PSK symbol synchronizer | Matta, M; Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Giardino, D; Nannarelli, A; Re, M; Spano, S | Articolo su rivista | |
1-gen-2019 | A Q-learning based PSK symbol synchronizer | Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Giardino, D; Matta, M; Re, M; Silvestri, F; Spano, S | Intervento a convegno | |
1-gen-2018 | Comparison of low-complexity algorithms for real-time QRS detection using standard ECG database | Francesca, S; Cardarilli Gian, C; Di Nunzio, L; Fazzolari, R; Re, M | Articolo su rivista | |
1-gen-2018 | Comparison between trigonometric and traditional DDS, in 90 nm technology | Cardarilli, Gc; Di Nunzio, L; Giardino, D; Matta, M; Nannarelli, A; Re, M; Silvestri, F; Spanò, S | Articolo su rivista | |
1-gen-2018 | A Power Efficient Digital Front-End for Cognitive Radio Systems | Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Nannarelli, A; Re, M | Intervento a convegno | |
1-gen-2018 | ZnO-rGO composite thin film resistive switching device: emulating biological synapse behavior | Khanal, G; Acciarito, S; Cardarilli, Gc; Chakraborty, A; DI NUNZIO, L; Fazzolari, R; Cristini, A; Susi, G; Re, M | Contributo in libro | |
1-gen-2018 | Compressive sensing reconstruction for complex system: A hardware/software approach | Acciarito, S; Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Khanal, Gm; Re, M | Intervento a convegno | |
1-gen-2018 | Analog chain calibration in Digital Beam-Forming applications | Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Re, M; Rufolo, G; Bernocchi, G | Articolo su rivista | |
1-gen-2018 | Energy consumption saving in embedded microprocessors using hardware accelerators | Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Re, M; Silvestri, F; Spano, S | Articolo su rivista | |
1-gen-2018 | Setup and experimental results analysis of COTS Camera and SRAMs at the ISIS neutron facility | Ottavi, M; Asciolla, D; Fiorucci, T; Grosso, E; Marzullo, C; Scaramella, A; Stramaccioni, S; Zibecchi, A; Andreani, C; Cardarilli, Gc; Cazzaniga, C; Di Nunzio, L; Fazzolari, R; Re, M; Reviriego, P; Furano, G; Senesi, R | Intervento a convegno | |
1-gen-2018 | Digital Architecture and ASIC Implementation of Wideband Delta DOR Spacecraft Onboard Tracker | Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Gelfusa, D; Matta, M; Nannarelli, A; Re, M; Simone, L; Spano, S | Intervento a convegno | |
1-gen-2017 | RNS applications in digital signal processing | Cardarilli, Gc; Nannarelli, A; Re, M | Contributo in libro | |
1-gen-2017 | Comparison of jamming excision methods for direct sequence/spread spectrum (DS/SS) modulated signal | Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Fereidountabar, A; Giuliani, F; Re, M; Simone, L | Articolo su rivista | |
1-gen-2017 | Synaptic behaviour in ZnO-rGO composites thin film memristor | Khanal, G; Acciarito, S; Cardarilli, G; Chakraborty, A; Di Nunzio, L; Fazzolari, R; Cristini, A; Re, M; Susi, G | Articolo su rivista | |
1-gen-2017 | A new electric encoder position estimator based on the Chinese Remainder Theorem for the CMG performance improvements | Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Gerardi, L; Re, M; Campolo, G; Cascone, D | Intervento a convegno | |
1-gen-2017 | A wireless sensor node based on microbial fuel cell | Acciarito, S; Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Re, M | Contributo in libro | |
1-gen-2017 | Hardware design of LIF with Latency neuron model with memristive STDP synapses | Acciarito, S; Cardarilli, Gc; Cristini, A; DI NUNZIO, L; Fazzolari, R; Khanal, G; Re, M; Susi, G | Articolo su rivista | |
1-gen-2017 | Robust throughput boosting for low latency dynamic partial reconfiguration | Nannarelli, A; Re, M; Cardarilli, Gc; Di Nunzio, L; Brunella, Ms; Fazzolari, R; Carbonari, F | Intervento a convegno | |
1-gen-2017 | Flexible channel extractor for wideband systems based on polyphase filter bank | Cappello, S; Cardarilli, Gc; di Nunzio, L; Fazzolari, R; Re, M; Albicocco, P | Articolo su rivista | |
1-gen-2016 | A hardware framework for on-chip FPGA acceleration | Lomuscio, A; Cardarilli, Gc; Nannarelli, A; Re, M | Intervento a convegno | |
1-gen-2016 | Dynamically-loaded Hardware Libraries (HLL) technology for audio applications | Esposito, A; Lomuscio, A; Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Nannarelli, A; Re, M | Intervento a convegno | |
1-gen-2016 | Fully digital intensity modulated LIDAR | Pollastrone, F; Cardarilli, Gc; Pizzoferrato, R; Re, M | Articolo su rivista | |
1-gen-2016 | A ZnO-rGO composite thin film discrete memristor | Khanal, Gm; Cardarilli, G; Chakraborty, A; Acciarito, S; Mulla, My; Di Nunzio, L; Fazzolari, R; Re, M | Intervento a convegno | |
1-gen-2016 | Design and characterization of a high-safety hardware/software module for the acquisition of Eurobalise telegrams | Giuliani, F; Ottavi, M; Cardarilli, Gc; Re, M; DI NUNZIO, L; Fazzolari, R; Bruno, A; Zuliani, F | Intervento a convegno | |
1-gen-2015 | Characterization of RNS multiply-add units for power efficient DSP | Cardarilli, Gc; Nannarelli, A; Petricca, M; Re, M | Intervento a convegno | |
1-gen-2015 | A framework for dynamically-loaded hardware library (HLL) in FPGA acceleration | Cardarilli, Gc; Di Carlo, L; Nannarelli, A; Pandolfi, Fm; Re, M | Intervento a convegno | |
1-giu-2014 | High performance bit-stream decompressor for partial reconfigurable FPGAs | Cardarilli, Gc; Re, M; Shuli, I | Contributo in libro | |
1-giu-2014 | A reconfigurable functional unit for modular operations | Cardarilli, Gc; DI NUNZIO, L; Fazzolari, R; Pontarelli, S; Re, M | Contributo in libro | |
1-gen-2014 | Event-driven simulation of continuous-time neural networks | Salerno, M; Susi, G; Cristini, A; Re, M; Cardarilli, Gc | Intervento a convegno | |
1-gen-2014 | TDES cryptography algorithm acceleration using a reconfigurable functional unit | Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Re, M | Intervento a convegno | |
1-gen-2014 | Twenty years of research on RNS for DSP: Lessons learned and future perspectives | Albicocco, P; Cardarilli, Gc; Nannarelli, A; Re, M | Intervento a convegno | |
1-nov-2013 | Compressive sensing spectrum analysis for space autonomous radio receivers | Cardarilli, Gc; Re, M; Shuli, I; Simone, L | Intervento a convegno | |
1-nov-2013 | Spiking neural networks based on LIF with latency: Simulation and synchronization effects | Cardarilli, Gc; Cristini, A; DI NUNZIO, L; Re, M; Salerno, M; Susi, G | Intervento a convegno | |
1-nov-2013 | Truncated multipliers through power-gating for degrading precision arithmetic | Albicocco, P; Cardarilli, Gc; Nannarelli, A; Petricca, M; Re, M | Intervento a convegno | |
1-giu-2013 | Continuous-time spiking neural networks: general paradigm and event-driven simulation | Salerno, M; Susi, G; Cristini, A; Re, M; Cardarilli, Gc | Intervento a convegno | |
1-gen-2013 | AudiNect: an aid for the autonomous navigation of visually impaired people, based on virtual interface | Salerno, M; Re, M; Cristini, A; Susi, G; Bertola, M; Daddario, E; Capobianco, F | Articolo su rivista | |
1-gen-2012 | Integration of butterfly and inverse butterfly nets in embedded processors: Effects on power saving | Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Re, M; Lee, R | Intervento a convegno | |
1-gen-2012 | Imprecise arithmetic for low power image processing | Albicocco, P; Cardarilli, Gc; Nannarelli, A; Petricca, M; Re, M | Intervento a convegno | |
1-gen-2012 | Karatsuba implementation of FIR filters | Albicocco, P; Cardarilli, Gc; Pontarelli, S; Re, M | Intervento a convegno | |
1-gen-2012 | Optimized implementation of RNS FIR filters based on FPGAs | Pontarelli, S; Cardarilli, Gc; Re, M; Salsano, A | Articolo su rivista | |
1-gen-2012 | Power efficient design of parallel/serial FIR filters in RNS | Petricca, M; Albicocco, P; Cardarilli, Gc; Nannarelli, A; Re, M | Intervento a convegno | |
1-gen-2011 | Degrading precision arithmetics for low-power FIR implementation | Albicocco, P; Cardarilli, Gc; Nannarelli, A; Petricca, M; Re, M | Intervento a convegno | |
1-gen-2011 | FPGA implementation of a low-area/high-SFDR DDFS architecture | Cardarilli, Gc; D'Alessio, M; Di Nunzio, L; Fazzolari, R; Murgia, D; Re, M | Intervento a convegno | |
1-gen-2011 | Fine-grain reconfigurable functional unit for embedded processors | Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Re, M | Intervento a convegno | |
1-gen-2011 | Partial reconfiguration in the implementation of autonomous radio receivers for space | Cardarilli, Gc; Re, M; Shuli, I; Simone, L | Intervento a convegno | |
1-gen-2011 | Implementation of the AES algorithm using a reconfigurable functional unit | Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Pontarelli, S; Re, M; Salsano, A | Intervento a convegno | |
1-gen-2010 | Butterfly and inverse butterfly nets integration on Altera NIOS-II embedded processor | Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Re, M; Lee, R | Intervento a convegno | |
1-gen-2010 | Degrading precision arithmetic for low power signal processing | Petricca, M; Cardarilli, Gc; Nannarelli, A; Re, M; Albicocco, P | Intervento a convegno | |
1-gen-2010 | Design of large polyphase filters in the quadratic residue number system | Cardarilli, Gc; Nannarelli, A; Oster, Y; Petricca, M; Re, M | Intervento a convegno | |
1-gen-2010 | On the comparison of different number systems in the implementation of complex FIR filters | Cardarilli, Gc; Nannarelli, A; Re, M | Contributo in libro | |
1-gen-2010 | VLSI implementation of reconfigurable cells for RFU in embedded processors | Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Lenci, C; Re, M | Intervento a convegno | |
1-gen-2010 | Algorithm acceleration on LEON-2 processor using a reconfigurable bit manipulation unit | Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Re, M | Intervento a convegno | |
1-gen-2009 | Hardware implementation of MPEG analysis and deblocking for video enhancement | Petricca, M; Li, H; Forchhammer, S; Nannarelli, A; Re, M; Andersen, J; Cardarilli, Gc | Intervento a convegno | |
1-gen-2009 | Improved large-signal model for vacuum triodes | Cardarilli, Gc; Re, M; Di Carlo, L | Intervento a convegno | |
1-gen-2009 | Speed-up of RISC processor computation using ADAPTO | Cardarilli, Gc; Di Nunzio, L; Re, M | Intervento a convegno | |
1-gen-2009 | Multiple constant multiplication through residue number system | Shuli, I; Petricca, M; Cardarilli, Gc; Nannarelli, A; Re, M | Intervento a convegno | |
1-gen-2009 | Error correction codes for SEU and SEFI tolerant memory systems | Pontarelli, S; Cardarilli, Gc; Re, M; Salsano, A | Intervento a convegno |
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