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Mostrati risultati da 1 a 100 di 125
Data di pubblicazione Titolo Autore(i) Tipo File
1-gen-2023 Efficient Digital Implementation of a Multirate-based Variable Fractional Delay Filter for Wideband Beamforming Canese, L; Cardarilli, Gc; Nunzio, Ld; Fazzolari, R; Giardino, D; Re, M; Spano, S Articolo su rivista
1-gen-2023 FPGA-Based Road Crack Detection Using Deep Learning Canese, L; Cardarilli, G; Di Nunzio, L; Fazzolari, R; Re, M; Spano, S Intervento a convegno
15-nov-2022 Sensing and Detection of Traffic Signs Using CNNs: An Assessment on Their Performance Canese, L; Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Famil Ghadakchi, H; Re, M; Spanò, S Articolo su rivista
1-gen-2022 An FPGA-based multi-agent reinforcement learning timing synchronizer Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Giardino, D; Re, M; Ricci, A; Spano, S Articolo su rivista
1-gen-2022 A M-PSK Timing Recovery Loop Based on Q-Learning Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Giardino, D; Guadagno, M; Re, M; Spano, S Intervento a convegno
1-gen-2022 Design space exploration based methodology for residue number system digital filters implementation Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Nannarelli, A; Petricca, M; Re, M Articolo su rivista
1-gen-2021 “MR Q-Learning” Algorithm for Efficient Hardware Implementations Carlo Cardarilli, G; Di Nunzio, L; Fazzolari, R; Giardino, D; Natale, D; Re, M; Spano, S Intervento a convegno
1-gen-2021 Multi-agent reinforcement learning: a review of challenges and applications Canese, L; Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Giardino, D; Re, M; Spano, S Articolo su rivista
1-gen-2021 Design and FPGA Implementation of a Low Power OFDM Transmitter for Narrow-Band IoT Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Cesa, Rl; Re, M Intervento a convegno
1-gen-2021 An Action-selection policy generator for reinforcement learning hardware accelerators Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Giardino, D; Matta, M; Re, M; Spano, S Intervento a convegno
1-gen-2021 FPGA implementation of a QRD-RLS-based equalizer for MIMO systems Canese, L; Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Fiorentino, L; Giardino, D; Re, M; Spano, S Intervento a convegno
1-gen-2021 Author correction: A pseudo-softmax function for hardware-based high speed image classification Cardarilli, G; Di Nunzio, L; Fazzolari, R; Giardino, D; Nannarelli, A; Re, M; Spano, S Articolo su rivista
1-gen-2021 A pseudo-softmax function for hardware-based high speed image classification Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Giardino, D; Nannarelli, A; Re, M; Spano, S Articolo su rivista
1-gen-2021 A Parallel hardware implementation for 2D hierarchical clustering based on fuzzy logic Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Panella, M; Re, M; Rosato, A; Spano, S Articolo su rivista
1-gen-2021 M-PSK demodulator with joint carrier and timing recovery Giardino, D; Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Nannarelli, A; Re, M; Spano, S Articolo su rivista
1-gen-2020 Acoustic Emissions Detection and Ranging of Cracks in Metal Tanks Using Deep Learning Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Giardino, D; Matta, M; Re, M; Spano, S Intervento a convegno
1-gen-2020 Memristive and memory impedance behavior in a photo-annealed ZnO–rGO thin-film device Cardarilli, Gc; Khanal, Gm; Di Nunzio, L; Re, M; Fazzolari, R; Kumar, R Articolo su rivista
1-gen-2020 FPGA implementation of Q-RTS for real-time Swarm intelligence systems Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Giardino, D; Matta, M; Nannarelli, A; Re, M; Spano, S Intervento a convegno
1-gen-2020 AW-SOM, an algorithm for high-speed learning in hardware self-organizing maps Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Re, M; Spano, S Articolo su rivista
1-gen-2020 N-dimensional approximation of Euclidean distance Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Nannarelli, A; Re, M; Spano, S Articolo su rivista
1-gen-2020 Indoor localization system based on bluetooth low energy for museum applications Giuliano, R; Cardarilli, Gc; Cesarini, C; Di Nunzio, L; Fallucchi, F; Fazzolari, R; Mazzenga, F; Re, M; Vizzarri, A Articolo su rivista
1-gen-2019 A reinforcement learning-based QAM/PSK symbol synchronizer Matta, M; Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Giardino, D; Nannarelli, A; Re, M; Spano, S Articolo su rivista
1-gen-2019 Q-RTS: A real-time swarm intelligence based on multi-agent Q-learning Matta, M; Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Giardino, D; Re, M; Silvestri, F; Spano, S Articolo su rivista
1-gen-2019 Approximated computing for low power neural networks Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Giardino, D; Matta, M; Patetta, M; Re, M; Spano, S Articolo su rivista
1-gen-2019 Digital signal processing accelerator for RISC-V Calicchia, L; Ciotoli, V; Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Nannarelli, A; Re, M Intervento a convegno
1-gen-2019 Hardware prototyping and validation of a W-ΔDOR digital signal processor Cardarilli, G; Di Nunzio, L; Fazzolari, R; Giardino, D; Matta, M; Re, M; Iess, L; Cialfi, F; De Angelis, G; Gelfusa, D; Pulcinelli, Ap; Simone, L Articolo su rivista
1-gen-2019 Efficient FPGA implementation of high speed digital delay for wideband beamforming using parallel architectures Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Giardino, D; Matta, M; Re, M; Spano, S; Simone, L Articolo su rivista
1-gen-2019 Approximated Canonical Signed Digit for Error Resilient Intelligent Computation Cardarilli, Gc; DI Nunzio, L; Fazzolari, R; Nannarelli, A; Re, M Intervento a convegno
1-gen-2019 Digital architecture of next generation spacecraft tracker based on wideband ∆DOR Acciarito, S; Cardarilli, Gc; Khanal, Gm; Matta, M; Re, M; Silvestri, F; Spano, S; Gelfusa, D; Simone, L Intervento a convegno
1-gen-2019 IP generator tool for efficient hardware acceleration of self-organizing maps Giardino, D; Matta, M; Re, M; Silvestri, F; Spanò, S Intervento a convegno
1-gen-2019 Comparison and implementation of variable fractional delay filters for wideband digital beamforming Cardarilli, Gc; Giardino, D; Matta, M; Re, M; Silvestri, F; Simone, L; Spano, S Intervento a convegno
1-gen-2019 An efficient hardware implementation of reinforcement learning: The q-learning algorithm Spanò, S; Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Giardino, D; Matta, M; Nannarelli, A; Re, M Articolo su rivista
1-gen-2019 FPGA implementation of a channelizer with 2048 channels utilizing USRP-SDR platform for satellite communications Acciarito, S; Giardino, D; Khanal, Gm; Re, M; Silvestri, F; Spanò, S Intervento a convegno
1-gen-2019 Efficient ensemble machine learning implementation on FPGA using partial reconfiguration Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Giardino, D; Matta, M; Re, M; Silvestri, F; Spano, S Intervento a convegno
1-gen-2019 FPGA implementation of a low-power QRS extractor Silvestri, F; Acciarito, S; Cardarilli, Gc; Khanal, Gm; Di Nunzio, L; Fazzolari, R; Re, M Intervento a convegno
1-gen-2019 Merged carrier and timing recovery loops QPSK demodulator based on iterative learning control Cardarilli, Gc; Giardino, D; Di Nunzio, L; Fazzolari, R; Matta, M; Re, M; Silvestri, F; Spano, S Intervento a convegno
1-gen-2019 A Q-learning based PSK symbol synchronizer Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Giardino, D; Matta, M; Re, M; Silvestri, F; Spano, S Intervento a convegno
1-gen-2019 Improvement of the cardiac oscillator based model for the simulation of bundle branch blocks Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Re, M; Silvestri, F Articolo su rivista
1-gen-2018 Comparison of low-complexity algorithms for real-time QRS detection using standard ECG database Francesca, S; Cardarilli Gian, C; Di Nunzio, L; Fazzolari, R; Re, M Articolo su rivista
1-gen-2018 Comparison between trigonometric and traditional DDS, in 90 nm technology Cardarilli, Gc; Di Nunzio, L; Giardino, D; Matta, M; Nannarelli, A; Re, M; Silvestri, F; Spanò, S Articolo su rivista
1-gen-2018 Energy consumption saving in embedded microprocessors using hardware accelerators Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Re, M; Silvestri, F; Spano, S Articolo su rivista
1-gen-2018 A Power Efficient Digital Front-End for Cognitive Radio Systems Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Nannarelli, A; Re, M Intervento a convegno
1-gen-2018 Analog chain calibration in Digital Beam-Forming applications Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Re, M; Rufolo, G; Bernocchi, G Articolo su rivista
1-gen-2018 Digital Architecture and ASIC Implementation of Wideband Delta DOR Spacecraft Onboard Tracker Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Gelfusa, D; Matta, M; Nannarelli, A; Re, M; Simone, L; Spano, S Intervento a convegno
1-gen-2018 Compressive sensing reconstruction for complex system: A hardware/software approach Acciarito, S; Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Khanal, Gm; Re, M Intervento a convegno
1-gen-2018 ZnO-rGO composite thin film resistive switching device: emulating biological synapse behavior Khanal, G; Acciarito, S; Cardarilli, Gc; Chakraborty, A; DI NUNZIO, L; Fazzolari, R; Cristini, A; Susi, G; Re, M Contributo in libro
1-gen-2018 Setup and experimental results analysis of COTS Camera and SRAMs at the ISIS neutron facility Ottavi, M; Asciolla, D; Fiorucci, T; Grosso, E; Marzullo, C; Scaramella, A; Stramaccioni, S; Zibecchi, A; Andreani, C; Cardarilli, Gc; Cazzaniga, C; Di Nunzio, L; Fazzolari, R; Re, M; Reviriego, P; Furano, G; Senesi, R Intervento a convegno
1-gen-2017 Robust throughput boosting for low latency dynamic partial reconfiguration Nannarelli, A; Re, M; Cardarilli, Gc; Di Nunzio, L; Brunella, Ms; Fazzolari, R; Carbonari, F Intervento a convegno
1-gen-2017 A new electric encoder position estimator based on the Chinese Remainder Theorem for the CMG performance improvements Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Gerardi, L; Re, M; Campolo, G; Cascone, D Intervento a convegno
1-gen-2017 Synaptic behaviour in ZnO-rGO composites thin film memristor Khanal, G; Acciarito, S; Cardarilli, G; Chakraborty, A; Di Nunzio, L; Fazzolari, R; Cristini, A; Re, M; Susi, G Articolo su rivista
1-gen-2017 Hardware design of LIF with Latency neuron model with memristive STDP synapses Acciarito, S; Cardarilli, Gc; Cristini, A; DI NUNZIO, L; Fazzolari, R; Khanal, G; Re, M; Susi, G Articolo su rivista
1-gen-2017 Comparison of jamming excision methods for direct sequence/spread spectrum (DS/SS) modulated signal Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Fereidountabar, A; Giuliani, F; Re, M; Simone, L Articolo su rivista
1-gen-2017 A wireless sensor node based on microbial fuel cell Acciarito, S; Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Re, M Contributo in libro
1-gen-2017 RNS applications in digital signal processing Cardarilli, Gc; Nannarelli, A; Re, M Contributo in libro
1-gen-2017 Flexible channel extractor for wideband systems based on polyphase filter bank Cappello, S; Cardarilli, Gc; di Nunzio, L; Fazzolari, R; Re, M; Albicocco, P Articolo su rivista
1-gen-2016 Fully digital intensity modulated LIDAR Pollastrone, F; Cardarilli, Gc; Pizzoferrato, R; Re, M Articolo su rivista
1-gen-2016 A hardware framework for on-chip FPGA acceleration Lomuscio, A; Cardarilli, Gc; Nannarelli, A; Re, M Intervento a convegno
1-gen-2016 A ZnO-rGO composite thin film discrete memristor Khanal, Gm; Cardarilli, G; Chakraborty, A; Acciarito, S; Mulla, My; Di Nunzio, L; Fazzolari, R; Re, M Intervento a convegno
1-gen-2016 Design and characterization of a high-safety hardware/software module for the acquisition of Eurobalise telegrams Giuliani, F; Ottavi, M; Cardarilli, Gc; Re, M; DI NUNZIO, L; Fazzolari, R; Bruno, A; Zuliani, F Intervento a convegno
1-gen-2016 Dynamically-loaded Hardware Libraries (HLL) technology for audio applications Esposito, A; Lomuscio, A; Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Nannarelli, A; Re, M Intervento a convegno
1-gen-2015 Characterization of RNS multiply-add units for power efficient DSP Cardarilli, Gc; Nannarelli, A; Petricca, M; Re, M Intervento a convegno
1-gen-2015 A framework for dynamically-loaded hardware library (HLL) in FPGA acceleration Cardarilli, Gc; Di Carlo, L; Nannarelli, A; Pandolfi, Fm; Re, M Intervento a convegno
1-giu-2014 High performance bit-stream decompressor for partial reconfigurable FPGAs Cardarilli, Gc; Re, M; Shuli, I Contributo in libro
1-giu-2014 A reconfigurable functional unit for modular operations Cardarilli, Gc; DI NUNZIO, L; Fazzolari, R; Pontarelli, S; Re, M Contributo in libro
1-gen-2014 Event-driven simulation of continuous-time neural networks Salerno, M; Susi, G; Cristini, A; Re, M; Cardarilli, Gc Intervento a convegno
1-gen-2014 Twenty years of research on RNS for DSP: Lessons learned and future perspectives Albicocco, P; Cardarilli, Gc; Nannarelli, A; Re, M Intervento a convegno
1-gen-2014 TDES cryptography algorithm acceleration using a reconfigurable functional unit Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Re, M Intervento a convegno
1-nov-2013 Compressive sensing spectrum analysis for space autonomous radio receivers Cardarilli, Gc; Re, M; Shuli, I; Simone, L Intervento a convegno
1-nov-2013 Truncated multipliers through power-gating for degrading precision arithmetic Albicocco, P; Cardarilli, Gc; Nannarelli, A; Petricca, M; Re, M Intervento a convegno
1-nov-2013 Spiking neural networks based on LIF with latency: Simulation and synchronization effects Cardarilli, Gc; Cristini, A; DI NUNZIO, L; Re, M; Salerno, M; Susi, G Intervento a convegno
1-giu-2013 Continuous-time spiking neural networks: general paradigm and event-driven simulation Salerno, M; Susi, G; Cristini, A; Re, M; Cardarilli, Gc Intervento a convegno
1-gen-2013 AudiNect: an aid for the autonomous navigation of visually impaired people, based on virtual interface Salerno, M; Re, M; Cristini, A; Susi, G; Bertola, M; Daddario, E; Capobianco, F Articolo su rivista
1-gen-2012 Karatsuba implementation of FIR filters Albicocco, P; Cardarilli, Gc; Pontarelli, S; Re, M Intervento a convegno
1-gen-2012 Optimized implementation of RNS FIR filters based on FPGAs Pontarelli, S; Cardarilli, Gc; Re, M; Salsano, A Articolo su rivista
1-gen-2012 Integration of butterfly and inverse butterfly nets in embedded processors: Effects on power saving Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Re, M; Lee, R Intervento a convegno
1-gen-2012 Imprecise arithmetic for low power image processing Albicocco, P; Cardarilli, Gc; Nannarelli, A; Petricca, M; Re, M Intervento a convegno
1-gen-2012 Power efficient design of parallel/serial FIR filters in RNS Petricca, M; Albicocco, P; Cardarilli, Gc; Nannarelli, A; Re, M Intervento a convegno
1-gen-2011 FPGA implementation of a low-area/high-SFDR DDFS architecture Cardarilli, Gc; D'Alessio, M; Di Nunzio, L; Fazzolari, R; Murgia, D; Re, M Intervento a convegno
1-gen-2011 Partial reconfiguration in the implementation of autonomous radio receivers for space Cardarilli, Gc; Re, M; Shuli, I; Simone, L Intervento a convegno
1-gen-2011 Implementation of the AES algorithm using a reconfigurable functional unit Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Pontarelli, S; Re, M; Salsano, A Intervento a convegno
1-gen-2011 Fine-grain reconfigurable functional unit for embedded processors Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Re, M Intervento a convegno
1-gen-2011 Degrading precision arithmetics for low-power FIR implementation Albicocco, P; Cardarilli, Gc; Nannarelli, A; Petricca, M; Re, M Intervento a convegno
1-gen-2010 Butterfly and inverse butterfly nets integration on Altera NIOS-II embedded processor Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Re, M; Lee, R Intervento a convegno
1-gen-2010 On the comparison of different number systems in the implementation of complex FIR filters Cardarilli, Gc; Nannarelli, A; Re, M Contributo in libro
1-gen-2010 Design of large polyphase filters in the quadratic residue number system Cardarilli, Gc; Nannarelli, A; Oster, Y; Petricca, M; Re, M Intervento a convegno
1-gen-2010 Degrading precision arithmetic for low power signal processing Petricca, M; Cardarilli, Gc; Nannarelli, A; Re, M; Albicocco, P Intervento a convegno
1-gen-2010 VLSI implementation of reconfigurable cells for RFU in embedded processors Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Lenci, C; Re, M Intervento a convegno
1-gen-2010 Algorithm acceleration on LEON-2 processor using a reconfigurable bit manipulation unit Cardarilli, Gc; Di Nunzio, L; Fazzolari, R; Re, M Intervento a convegno
1-gen-2009 Error correction codes for SEU and SEFI tolerant memory systems Pontarelli, S; Cardarilli, Gc; Re, M; Salsano, A Intervento a convegno
1-gen-2009 Speed-up of RISC processor computation using ADAPTO Cardarilli, Gc; Di Nunzio, L; Re, M Intervento a convegno
1-gen-2009 Arithmetic/logic blocks for fine-grained reconfigurable units Cardarilli, Gc; Di Nunzio, L; Re, M Intervento a convegno
1-gen-2009 Improved large-signal model for vacuum triodes Cardarilli, Gc; Re, M; Di Carlo, L Intervento a convegno
1-gen-2009 Error detection in addition chain based ECC point multiplication Pontarelli, S; Cardarilli, Gc; Re, M; Salsano, A Intervento a convegno
1-gen-2009 Multiple constant multiplication through residue number system Shuli, I; Petricca, M; Cardarilli, Gc; Nannarelli, A; Re, M Intervento a convegno
1-gen-2009 Hardware implementation of MPEG analysis and deblocking for video enhancement Petricca, M; Li, H; Forchhammer, S; Nannarelli, A; Re, M; Andersen, J; Cardarilli, Gc Intervento a convegno
1-gen-2008 A novel error detection and correction technique for RNS based FIR filters Pontarelli, S; Cardarilli, Gc; Re, M; Salsano, A Intervento a convegno
1-gen-2008 A software defined radio architecture for a regenerative on-board processor Iacomacci, F; Morlet, C; Autelitano, F; Cardarilli, Gc; Re, M; Petrongari, E; Bogo, G; Franceschelli, M Intervento a convegno
1-gen-2008 ADAPTO: Full-adder based reconfigurable architecture for bit level operations Cardarilli, Gc; Di Nunzio, L; Re, M; Nannarelli, A Intervento a convegno
1-gen-2008 Reducing power dissipation in pipelined accumulators Cardarilli, Gc; Nannarelli, A; Re, M Intervento a convegno
1-gen-2008 Totally fault tolerant RNS based FIR filters Pontarelli, S; Cardarilli, Gc; Re, M; Salsano, A Intervento a convegno
Mostrati risultati da 1 a 100 di 125
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